Радиолоцман Электроника en
расширенный поиск +
  

Производитель:Texas Instruments
Серия:ADC322x
Модель:PADC3224IRGZT

2-канальный АЦП 12-битной точностью, со скоростью выборки от 25 до125 млн. выборок в секунду (MSPS) с интерфейсом LVDS

ADC322x включает: ADC322x ADC3221, ADC3222, ADC3223, ADC322

Datasheets

  • Скачать » Datasheet, PDF, 1.5 Мб
    Выписка из документа ↓
    Product Folder Sample & Buy Technical Documents Tools & Software Support & Community ADC3221, ADC3222, ADC3223, ADC3224
    SBAS672 ­ JULY 2014 ADC322x Dual-Channel, 12-Bit, 25-MSPS to 125-MSPS, Analog-to-Digital Converters
    1 Features 1 3 Description
    The ADC322x are a high-linearity, ultra-low power, dual-channel, 12-bit, 25-MSPS to 125-MSPS, analogto-digital converter (ADC) family. The devices are designed specifically to support demanding, high input frequency signals with large dynamic range requirements. An input clock divider allows more flexibility for system clock architecture design while the SYSREF input enables complete system synchronization. The ADC322x family supports serial low-voltage differential signaling (LVDS) and JESD204B interfaces in order to reduce the number of interface lines, thus allowing for high system integration density. The serial LVDS interface is twowire, where each ADC data are serialized and output over two LVDS pairs. An internal phase-locked loop (PLL) multiplies the incoming ADC sampling clock to derive the bit clock that is used to serialize the 12-bit output data from each channel. In addition to the serial data streams, the frame and bit clocks are also transmitted as LVDS outputs. Device Information(1)
    PART NUMBER ADC322x PACKAGE VQFN (48) BODY SIZE (NOM) 7.00 mm Ч 7.00 mm 2 Applications Multi-Carrier, Multi-Mode Cellular Base Stations Radar and Smart Antenna Arrays Munitions Guidance Motor Control Feedback Network and Vector Analyzers Communications Test Equipment Nondestructive Testing Microwave Receivers Software-Defined Radios (SDRs) Quadrature and Diversity Radio Receivers (1) For all available packages, see the orderable addendum at the end of the datasheet. space space space Performance at fS = 125 MSPS, fIN = 10 MHz (SNR = 70.4 dBFS, SFDR = 93 dBc)
    0 -20
    Attenuation (dB) -40 -60 -80 -100 -120 0 10 20 30 40 Frequency (MHz) 50 60
    D001 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCT PREVIEW Information. Product in design phase of development. Subject to change or discontinuance without notice. PRODUCT PREVIEW Dual Channel 12-Bit Resolution Single Supply: 1.8 V Serial LVDS Interface (SLVDS) Flexible Input Clock Buffer with Divide-by-1, -2, -4 SNR = 70.2 dBFS, SFDR = 87 dBc at fIN = 70 MHz Ultra-Low Power Consumption: ­ 116 mW/Ch at 125 MSPS Channel Isolation = 105 dB Internal Dither and Chopper Support for Multi-Chip Synchronization Pin-to-Pin Compatible with ...

Цены

Выписка из документа:
Product Folder Sample & Buy Technical Documents Tools & Software Support & Community ADC3221, ADC3222, ADC3223, ADC3224
SBAS672 ­ JULY 2014 ADC322x Dual-Channel, 12-Bit, 25-MSPS to 125-MSPS, Analog-to-Digital Converters
1 Features 1 3 Description
The ADC322x are a high-linearity, ultra-low power, dual-channel, 12-bit, 25-MSPS to 125-MSPS, analogto-digital converter (ADC) family. The devices are designed specifically to support demanding, high input frequency signals with large dynamic range requirements. An input clock divider allows more flexibility for system clock architecture design while the SYSREF input enables complete system synchronization. The ADC322x family supports serial low-voltage differential signaling (LVDS) and JESD204B interfaces in order to reduce the number of interface lines, thus allowing for high system integration density. The serial LVDS interface is twowire, where each ADC data are serialized and output over two LVDS pairs. An internal phase-locked loop (PLL) multiplies the incoming ADC sampling clock to derive the bit clock that is used to serialize the 12-bit output data from each channel. In addition to the serial data streams, the frame and bit clocks are also transmitted as LVDS outputs. Device Information(1)
PART NUMBER ADC322x PACKAGE VQFN (48) BODY SIZE (NOM) 7.00 mm Ч 7.00 mm 2 Applications Multi-Carrier, Multi-Mode Cellular Base Stations Radar and Smart Antenna Arrays Munitions Gui...

  • Серия: ADC322x (1)
    • PADC3224IRGZT

На английском языке: Datasheet Texas Instruments PADC3224IRGZT

Рекомендуемые материалы по теме:

При перепечатке материалов с сайта прямая ссылка на РадиоЛоцман обязательна.

Срезы ↓
Датчики влажности и температуры ДВТ-03
Цена: от 3 168 руб.
Доставка: Россия и страны СНГ
DIY настольный 3D принтер
Цена: 163 $ (9500 руб.)
Промо-акция, последняя скидка
Очки с подсветкой и сменными окулярами
Цена: от 8 $ (477 руб.)
Бесплатная доставка: Весь мир
радиолоцман вконтакте радиолоцман одноклассники радиолоцман facebook радиолоцман twitter радиолоцман google плюс