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Datasheet Texas Instruments ADS8410IBRGZT — Даташит

ПроизводительTexas Instruments
СерияADS8410
МодельADS8410IBRGZT
Datasheet Texas Instruments ADS8410IBRGZT

16-битный униполярный псевдодифференциальный вход, частота дискретизации 2 MSPS, АЦП от 4,75 до 5,25 В с последовательным интерфейсом LVDS 48-VQFN от -40 до 85

Datasheets

16-Bit, 2-MSPS, LVDS Serial Interface, SAR ADC. datasheet
PDF, 999 Кб, Версия: A, Файл опубликован: 5 май 2013
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Цены

13 предложений от 10 поставщиков
16Bit, Unipolar Pseudo Diff Input, 2MSPS Sampling rate, 4.75V to 5.25V ADC with LVDS Serial Interf 48-VQFN -40℃ to 85℃
EIS Components
Весь мир
ADS8410IBRGZT
Texas Instruments
1 658 ₽
Akcel
Весь мир
ADS8410IBRGZT
Texas Instruments
от 2 655 ₽
AiPCBA
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ADS8410IBRGZT
Texas Instruments
3 126 ₽
ЧипСити
Россия
ADS8410IBRGZT
Texas Instruments
3 132 ₽
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Статус

Статус продуктаВ производстве (Рекомендуется для новых разработок)
Доступность образцов у производителяНет

Корпус / Упаковка / Маркировка

Pin48
Package TypeRGZ
Industry STD TermVQFN
JEDEC CodeS-PQFP-N
Package QTY250
CarrierSMALL T&R
МаркировкаADS8410I
Width (мм)7
Length (мм)7
Thickness (мм).9
Pitch (мм).5
Max Height (мм)1
Mechanical DataСкачать

Параметры

# Input Channels1
Analog Voltage AVDD(Max)5.25 В
Analog Voltage AVDD(Min)4.75 В
АрхитектураSAR
Digital Supply(Max)5.25 В
Digital Supply(Min)2.7 В
INL(Max)2.5 +/-LSB
Input Range(Max)4.1 В
Тип входаPseudo-Differential,Single-Ended
Integrated FeaturesDaisy-Chainable,Oscillator
InterfaceParallel
Multi-Channel ConfigurationN/A
Рабочий диапазон температурот -40 до 85 C
Package GroupVQFN
Package Size: mm2:W x L48VQFN: 49 mm2: 7 x 7(VQFN) PKG
Power Consumption(Typ)155 mW
RatingCatalog
Reference ModeExt,Int
Разрешение16 Bits
SINAD87 дБ
SNR87.5 дБ
Sample Rate (max)2MSPS SPS
Sample Rate(Max)2 MSPS
THD(Typ)-98 дБ

Экологический статус

RoHSСовместим

Application Notes

  • Connecting ADS8410/13 With Long Cable
    PDF, 773 Кб, Файл опубликован: 2 дек 2005
    Many applications require that the analog-to-digital converter (ADC) be located near the field sensor; however, the digital processing often occurs at a distance. Therefore, the input and output signals need to travel through a long cable from the field sensor to the site where digital processing occurs. This application report is a guide for using a 1-meter cable, the Samtec EQCD Series high data
  • Using ADS8410/13 in Daisy Chain Mode
    PDF, 3.2 Мб, Файл опубликован: 22 май 2006
    Many applications require multiple analog-to-digital converters (ADC) in a system. Daisy chaining multiple ADCs enables the use of a single data receiver or a small FPGA. It offers easy and minimal digital routing. This application report describes how multiple ADCs (ADS8410/13) work in a daisy-chain mode. The device offers a high-speed (200 Mbps) LVDS serial interface. This application report als
  • Using ADS8410/13 in Cascade Mode
    PDF, 2.9 Мб, Файл опубликован: 8 июн 2006
    Many applications require multiple analog-to-digital converters (ADC) in a system. Cascading multiple ADCs enables the use of a single data receiver or a small FPGA. This offers lower power consumption and independent ADC usage. This application report describes how multiple ADCs (ADS8410/13) work in a cascade mode. The ADS8410/13 integrated circuit offers a high-speed (200 Mbps) LVDS serial inter
  • Using ADS8411 in a Multiplexed Analog Input Application (Rev. A)
    PDF, 2.1 Мб, Версия: A, Файл опубликован: 15 фев 2006
    This application report is intended as a guide for using an analog multiplexer to multiplex several input signals to a single high-resolution, high-speed SAR analog-to-digital converter (ADC). The ADC and the multiplexer used were the ADS8411 and the TS5A3159/3359, respectively. This document discusses the important parameters of a multiplexer and defines a few important measurements for evaluatin
  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Кб, Версия: A, Файл опубликован: 10 ноя 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Кб, Файл опубликован: 17 мар 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

Модельный ряд

Серия: ADS8410 (2)

Классификация производителя

  • Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)

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