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Datasheet Texas Instruments ADS62P45IRGCT — Даташит

ПроизводительTexas Instruments
СерияADS62P45
МодельADS62P45IRGCT
Datasheet Texas Instruments ADS62P45IRGCT

Двухканальный 14-разрядный аналого-цифровой преобразователь (АЦП) с быстродействием 125 MSPS 64-VQFN от -40 до 85

Datasheets

DUAL CHANNEL 14-BITS 125/105/80/65 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS datasheet
PDF, 1.9 Мб, Версия: C, Файл опубликован: 9 фев 2012
Выписка из документа

Цены

18 предложений от 13 поставщиков
TEXAS INSTRUMENTS ADS62P45IRGCT Analogue to Digital Converter, 14Bit, 125MSPS, Single, 3V, 3.6V, VQFN
Akcel
Весь мир
ADS62P45IRGCT
Texas Instruments
от 2 751 ₽
EIS Components
Весь мир
ADS62P45IRGCT
Texas Instruments
5 988 ₽
ЭИК
Россия
ADS62P45IRGCT
Texas Instruments
от 18 648 ₽
T-electron
Россия и страны СНГ
ADS62P45IRGCT
581 661 ₽
Выбираем схему BMS для заряда литий-железофосфатных (LiFePO4) аккумуляторов

Статус

Статус продуктаВ производстве (Рекомендуется для новых разработок)
Доступность образцов у производителяДа

Корпус / Упаковка / Маркировка

Pin64
Package TypeRGC
Industry STD TermVQFN
JEDEC CodeS-PQFP-N
Package QTY250
CarrierSMALL T&R
МаркировкаAZ62P45
Width (мм)9
Length (мм)9
Thickness (мм).88
Pitch (мм).5
Max Height (мм)1
Mechanical DataСкачать

Параметры

# Input Channels2
Analog Input BW450 МГц
АрхитектураPipeline
DNL(Typ)0.6 +/-LSB
ENOB11.8 Bits
INL(Max)3 +/-LSB
INL(Typ)2.5 +/-LSB
Input BufferNo
Input Range2 Vp-p
InterfaceDDR LVDS,Parallel CMOS
Рабочий диапазон температурот -40 до 85 C
Package GroupVQFN
Package Size: mm2:W x L64VQFN: 81 mm2: 9 x 9(VQFN) PKG
Power Consumption(Typ)792 mW
RatingCatalog
Reference ModeExt,Int
Разрешение14 Bits
SFDR85 дБ
SINAD73.2 дБ
SNR73.8 дБ
Sample Rate(Max)125 MSPS

Экологический статус

RoHSСовместим

Комплекты разработчика и оценочные наборы

  • Evaluation Modules & Boards: ADS62P45EVM
    ADS62P45 Dual-Channel, 14-Bit, 125-MSPS Analog-to-Digital Converter Evaluation Module
    Статус продукта: В производстве (Рекомендуется для новых разработок)
  • Evaluation Modules & Boards: ADS62P15EVM
    ADS62P15 Dual-Channel, 11-Bit, 125-MSPS Analog-to-Digital Converter Evaluation Module
    Статус продукта: В производстве (Рекомендуется для новых разработок)
  • Evaluation Modules & Boards: TSW1405EVM
    Data Capture: Data Converter EVMs With 8 LVDS Lanes up to 1.0Gbps
    Статус продукта: В производстве (Рекомендуется для новых разработок)
  • Evaluation Modules & Boards: TSW2200EVM
    TSW2200 Low-Cost Portable Power Supply Evaluation Module
    Статус продукта: В производстве (Рекомендуется для новых разработок)
  • Evaluation Modules & Boards: ADS62P25EVM
    ADS62P25 Dual-Channel, 12-Bit, 125-MSPS Analog-to-Digital Converter Evaluation Module
    Статус продукта: В производстве (Рекомендуется для новых разработок)

Application Notes

  • Band-Pass Filter Design Techniques for High-Speed ADCs
    PDF, 733 Кб, Файл опубликован: 27 фев 2012
    Several well-known methods exist for designing passive inductor-capacitor (LC) filters with resistive load terminations. However, when LC filters are used to drive the analog input pins of a high-speed analog-to-digital converter (ADC), special consideration must be given to the ADC input impedance. Not accounting for the ADC input impedance often results in a filter design that does not meet the
  • QFN Layout Guidelines
    PDF, 1.3 Мб, Файл опубликован: 28 июл 2006
    Board layout and stencil information for most Texas Instruments Quad Flat No-Lead (QFN) devices is provided in their data sheets. This document helps printed-circuit board designers understand and better use this information for optimal designs.
  • CDCE62005 as Clock Solution for High-Speed ADCs
    PDF, 805 Кб, Файл опубликован: 4 сен 2008
    TI has introduced a family of devices well-suited to meet the demands for high-speed ADC devices such as the ADS5527 which is capable of sampling up to 210 MSPS. To realize the full potential of these high-performance products it is imperative to provide a low phase noise clock source. The CDCE62005 clock synthesizer chip offers a real-world clocking solution to meet these stringent requirements
  • Why Use Oversampling when Undersampling Can Do the Job? (Rev. A)
    PDF, 1.2 Мб, Версия: A, Файл опубликован: 19 июл 2013
  • Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A)
    PDF, 2.0 Мб, Версия: A, Файл опубликован: 22 май 2015
  • Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio
    PDF, 376 Кб, Файл опубликован: 28 апр 2009
    This application report explains different aspects of selecting analog-to-digital and digital-to-analog data converters for Software-Defined Radio (SDR) applications. It also explains how ADS61xx ADCs and the DAC5688 from Texas Instruments fit properly for SDR designs.
  • Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A)
    PDF, 327 Кб, Версия: A, Файл опубликован: 10 сен 2010
    This application report discusses the performance-related aspects of passive and active interfaces at the analog input of high-speed pipeline analog-to-digital converters (ADCs). The report simplifies the many possibilities into two main categories: passive and active interface circuits. The first section of the report gives an overview of equivalent models of buffered and unbuffered ADC input cir
  • Phase Noise Performance and Jitter Cleaning Ability of CDCE72010
    PDF, 2.3 Мб, Файл опубликован: 2 июн 2008
    This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the reference clock VCXO clock and the CDCE72010 itself. This application report shows the phase noise performance at several of the most popular CDMA frequencies. This data helps the user to choose the rig
  • CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters
    PDF, 424 Кб, Файл опубликован: 8 июн 2008
    Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483 which is capable of sampling up to 135 MSPS. To realize the full potential of these high-performance devices the system must provide an extremely low phase noise clock source. The CDCE72010 clock synthesizer chip offers
  • Principles of Data Acquisition and Conversion (Rev. A)
    PDF, 132 Кб, Версия: A, Файл опубликован: 16 апр 2015
  • A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
    PDF, 425 Кб, Версия: B, Файл опубликован: 9 окт 2011
    This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
  • Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
    PDF, 69 Кб, Версия: A, Файл опубликован: 18 май 2015

Модельный ряд

Серия: ADS62P45 (2)

Классификация производителя

  • Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > High Speed ADCs (>10MSPS)

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