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Datasheet Texas Instruments 74ACT11074 — Даташит

ПроизводительTexas Instruments
Серия74ACT11074
Datasheet Texas Instruments 74ACT11074

Двойные шлепанцы D-типа с активацией по положительному фронту, с функцией Clear и предустановкой

Datasheets

Dual D-Type Positive-Edge-Triggered Flip Flop With Clear And Preset datasheet
PDF, 877 Кб, Версия: A, Файл опубликован: 1 апр 1996
Выписка из документа

Цены

24 предложений от 19 поставщиков
TEXAS INSTRUMENTS 74ACT11074N Flip-Flop, D, 6 ns, 125 MHz, 24 mA, DIP, 14 Pins
T-electron
Россия и страны СНГ
74ACT11074N
Texas Instruments
45 ₽
EIS Components
Весь мир
74ACT11074DR
Texas Instruments
71 ₽
МосЧип
Россия
74ACT11074NE4
Texas Instruments
по запросу
74ACT11074D*SM
Texas Instruments
по запросу
Электромеханические реле Hongfa – надежность и качество 19 января 2023

Статус

74ACT11074D74ACT11074DBLE74ACT11074DBR74ACT11074DG474ACT11074N74ACT11074NSR
Статус продуктаВ производствеСнят с производстваВ производствеВ производствеВ производствеВ производстве
Доступность образцов у производителяНетНетНетНетНетНет

Корпус / Упаковка / Маркировка

74ACT11074D74ACT11074DBLE74ACT11074DBR74ACT11074DG474ACT11074N74ACT11074NSR
N123456
Pin141414141414
Package TypeDDBDBDNNS
Industry STD TermSOICSSOPSSOPSOICPDIPSOP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDIP-TR-PDSO-G
Package QTY50200050252000
CarrierTUBELARGE T&RTUBETUBELARGE T&R
МаркировкаACT11074AT074ACT1107474ACT11074NACT11074
Width (мм)3.915.35.33.916.355.3
Length (мм)8.656.26.28.6519.310.3
Thickness (мм)1.581.951.951.583.91.95
Pitch (мм)1.27.65.651.272.541.27
Max Height (мм)1.75221.755.082
Mechanical DataСкачатьСкачатьСкачатьСкачатьСкачатьСкачать

Параметры

Parameters / Models74ACT11074D
74ACT11074D
74ACT11074DBLE
74ACT11074DBLE
74ACT11074DBR
74ACT11074DBR
74ACT11074DG4
74ACT11074DG4
74ACT11074N
74ACT11074N
74ACT11074NSR
74ACT11074NSR
3-State OutputNoNoNoNoNoNo
Approx. Price (US$)0.94 | 1ku
Bits22222
Bits(#)2
F @ Nom Voltage(Max), Mhz9090909090
F @ Nom Voltage(Max)(Mhz)90
ICC @ Nom Voltage(Max), мА0.040.040.040.040.04
ICC @ Nom Voltage(Max)(mA)0.04
Тип входаTTL
Рабочий диапазон температур, Cот -40 до 85от -40 до 85от -40 до 85от -40 до 85от -40 до 85
Operating Temperature Range(C)-40 to 85
Output Drive (IOL/IOH)(Max), мА24/-2424/-2424/-2424/-2424/-24
Output Drive (IOL/IOH)(Max)(mA)24/-24
Тип выходаCMOS
Package GroupSOICSSOPSSOPSOICPDIPSO
Package Size: mm2:W x L, PKG14SOIC: 52 mm2: 6 x 8.65(SOIC)14SSOP: 48 mm2: 7.8 x 6.2(SSOP)14SOIC: 52 mm2: 6 x 8.65(SOIC)See datasheet (PDIP)14SO: 80 mm2: 7.8 x 10.2(SO)
Package Size: mm2:W x L (PKG)See datasheet (PDIP)
RatingCatalogCatalogCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNoNoNo
Technology FamilyACTACTACTACTACTACT
VCC(Max), В5.55.55.55.55.5
VCC(Max)(V)5.5
VCC(Min), В4.54.54.54.54.5
VCC(Min)(V)4.5
Voltage(Nom), В55555
Voltage(Nom)(V)5
tpd @ Nom Voltage(Max), нс9.49.49.49.49.4
tpd @ Nom Voltage(Max)(ns)9.4

Экологический статус

74ACT11074D74ACT11074DBLE74ACT11074DBR74ACT11074DG474ACT11074N74ACT11074NSR
RoHSСовместимНе совместимСовместимСовместимСовместимСовместим
Бессвинцовая технология (Pb Free)ДаНет

Application Notes

  • Selecting the Right Level Translation Solution (Rev. A)
    PDF, 313 Кб, Версия: A, Файл опубликован: 22 июн 2004
    Supply voltages continue to migrate to lower nodes to support today's low-power high-performance applications. While some devices are capable of running at lower supply nodes others might not have this capability. To haveswitching compatibility between these devices the output of each driver must be compliant with the input of the receiver that it is driving. There are several level-translati
  • Introduction to Logic
    PDF, 93 Кб, Файл опубликован: 30 апр 2015
  • Implications of Slow or Floating CMOS Inputs (Rev. D)
    PDF, 260 Кб, Версия: D, Файл опубликован: 23 июн 2016
  • Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)
    PDF, 614 Кб, Версия: C, Файл опубликован: 2 дек 2015
  • Semiconductor Packing Material Electrostatic Discharge (ESD) Protection
    PDF, 337 Кб, Файл опубликован: 8 июл 2004
    Forty-eight-pin TSSOP components that were packaged using Texas Instruments (TI) standard packing methodology were subjected to electrical discharges between 0.5 and 20 kV as generated by an IEC ESD simulator to determine the level of ISD protection provided by the packing materials. The testing included trays tape and reel and magazines. Additional units were subjected to the same discharge
  • TI IBIS File Creation Validation and Distribution Processes
    PDF, 380 Кб, Файл опубликован: 29 авг 2002
    The Input/Output Buffer Information Specification (IBIS) also known as ANSI/EIA-656 has become widely accepted among electronic design automation (EDA) vendors semiconductor vendors and system designers as the format for digital electrical interface data. Because IBIS models do not reveal proprietary internal processes or architectural information semiconductor vendors? support for IBIS con
  • CMOS Power Consumption and CPD Calculation (Rev. B)
    PDF, 89 Кб, Версия: B, Файл опубликован: 1 июн 1997
    Reduction of power consumption makes a device more reliable. The need for devices that consume a minimum amount of power was a major driving force behind the development of CMOS technologies. As a result CMOS devices are best known for low power consumption. However for minimizing the power requirements of a board or a system simply knowing that CMOS devices may use less power than equivale
  • Power-Up Behavior of Clocked Devices (Rev. A)
    PDF, 34 Кб, Версия: A, Файл опубликован: 6 фев 2015
  • Designing With Logic (Rev. C)
    PDF, 186 Кб, Версия: C, Файл опубликован: 1 июн 1997
    Data sheets which usually give information on device behavior only under recommended operating conditions may only partially answer engineering questions that arise during the development of systems using logic devices. However information is frequently needed regarding the behavior of the device outside the conditions in the data sheet. Such questions might be:?How does a bus driver behave w
  • Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc
    PDF, 43 Кб, Файл опубликован: 1 апр 1996
    Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren

Модельный ряд

Классификация производителя

  • Semiconductors> Logic> Flip-Flop/Latch/Register> D-Type Flip-Flop

На английском языке: Datasheet Texas Instruments 74ACT11074

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