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Datasheet Texas Instruments ADS5553 — Даташит

ПроизводительTexas Instruments
СерияADS5553
Datasheet Texas Instruments ADS5553

Dual-Channel, 14-Bit, 65-MSPS Analog-to-Digital Converter (ADC)

Datasheets

Dual 14 Bit, 65 MSPS ADC
PDF, 950 Кб, Файл опубликован: 21 фев 2005
Dual 14 Bit, 65 MSPS ADC datasheet
PDF, 625 Кб, Файл опубликован: 21 фев 2005
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Цены

21 предложений от 17 поставщиков
Аналого-цифровые преобразователи (АЦП) Dual-Channel 14bit 65MSPS
Akcel
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ADS5553IPFP
Texas Instruments
от 1 645 ₽
EIS Components
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ADS5553IPFPR
Texas Instruments
3 183 ₽
ChipWorker
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ADS5553IPFPR
Texas Instruments
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ADS5553IPFPR
Texas Instruments
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Статус

ADS5553IPFPADS5553IPFPR
Статус продуктаВ производствеВ производстве
Доступность образцов у производителяНетНет

Корпус / Упаковка / Маркировка

ADS5553IPFPADS5553IPFPR
N12
Pin8080
Package TypePFPPFP
Industry STD TermHTQFPHTQFP
JEDEC CodeS-PQFP-GS-PQFP-G
Package QTY961000
CarrierJEDEC TRAY (10+1)LARGE T&R
МаркировкаADS5553IADS5553I
Width (мм)1212
Length (мм)1212
Thickness (мм)11
Pitch (мм).5.5
Max Height (мм)1.21.2
Mechanical DataСкачатьСкачать

Параметры

Parameters / ModelsADS5553IPFP
ADS5553IPFP
ADS5553IPFPR
ADS5553IPFPR
# Input Channels22
Analog Input BW, МГц750
Analog Input BW(MHz)750
Approx. Price (US$)37.50 | 1ku
АрхитектураPipelinePipeline
DNL(Max), +/-LSB0.6
DNL(Max)(+/-LSB)0.6
DNL(Typ), +/-LSB0.6
ENOB, Bits11.9
ENOB(Bits)11.9
INL(Max), +/-LSB2.5
INL(Max)(+/-LSB)2.5
INL(Typ), +/-LSB2.5
Input BufferNo
Input Range2.32.3V (p-p)
InterfaceParallel CMOSParallel CMOS
Serial SPI Interface
Рабочий диапазон температур, Cот -40 до 85
Operating Temperature Range(C)-40 to 85
Package GroupHTQFPHTQFP
Package Size(mm2=WxL)80HTQFP: 196 mm2: 14 x 14
Package Size: mm2:W x L, PKG80HTQFP: 196 mm2: 14 x 14(HTQFP)
Power Consumption(Typ), mW725
Power Consumption(Typ)(mW)725
RatingCatalogCatalog
Reference ModeExt,IntInt
Ext
Разрешение, Bits14
Resolution(Bits)14
SFDR, дБ84
SFDR(dB)84
SINAD, дБ73.4
SINAD(dB)73.4
SNR, дБ74
SNR(dB)74
Sample Rate (max)(SPS)65MSPS
Sample Rate(Max), MSPS65

Экологический статус

ADS5553IPFPADS5553IPFPR
RoHSСовместимСовместим
Бессвинцовая технология (Pb Free)Да

Application Notes

  • Clocking High-Speed Data Converters
    PDF, 310 Кб, Файл опубликован: 18 янв 2005
  • CDCE62005 as Clock Solution for High-Speed ADCs
    PDF, 805 Кб, Файл опубликован: 4 сен 2008
    TI has introduced a family of devices well-suited to meet the demands for high-speed ADC devices such as the ADS5527 which is capable of sampling up to 210 MSPS. To realize the full potential of these high-performance products it is imperative to provide a low phase noise clock source. The CDCE62005 clock synthesizer chip offers a real-world clocking solution to meet these stringent requirements
  • Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A)
    PDF, 2.0 Мб, Версия: A, Файл опубликован: 22 май 2015
  • Why Use Oversampling when Undersampling Can Do the Job? (Rev. A)
    PDF, 1.2 Мб, Версия: A, Файл опубликован: 19 июл 2013
  • Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio
    PDF, 376 Кб, Файл опубликован: 28 апр 2009
    This application report explains different aspects of selecting analog-to-digital and digital-to-analog data converters for Software-Defined Radio (SDR) applications. It also explains how ADS61xx ADCs and the DAC5688 from Texas Instruments fit properly for SDR designs.
  • Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A)
    PDF, 327 Кб, Версия: A, Файл опубликован: 10 сен 2010
    This application report discusses the performance-related aspects of passive and active interfaces at the analog input of high-speed pipeline analog-to-digital converters (ADCs). The report simplifies the many possibilities into two main categories: passive and active interface circuits. The first section of the report gives an overview of equivalent models of buffered and unbuffered ADC input cir
  • Phase Noise Performance and Jitter Cleaning Ability of CDCE72010
    PDF, 2.3 Мб, Файл опубликован: 2 июн 2008
    This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the reference clock VCXO clock and the CDCE72010 itself. This application report shows the phase noise performance at several of the most popular CDMA frequencies. This data helps the user to choose the rig
  • CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters
    PDF, 424 Кб, Файл опубликован: 8 июн 2008
    Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483 which is capable of sampling up to 135 MSPS. To realize the full potential of these high-performance devices the system must provide an extremely low phase noise clock source. The CDCE72010 clock synthesizer chip offers
  • Principles of Data Acquisition and Conversion (Rev. A)
    PDF, 132 Кб, Версия: A, Файл опубликован: 16 апр 2015
  • A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
    PDF, 425 Кб, Версия: B, Файл опубликован: 9 окт 2011
    This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
  • Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
    PDF, 69 Кб, Версия: A, Файл опубликован: 18 май 2015

Модельный ряд

Серия: ADS5553 (2)

Классификация производителя

  • Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> High Speed ADCs (>10MSPS)

На английском языке: Datasheet Texas Instruments ADS5553

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