Datasheet Texas Instruments DP83640 — Даташит
| Производитель | Texas Instruments |
| Серия | DP83640 |
Precision PHYTER - IEEE 1588 Precision Time Protocol Transceiver
Datasheets
DP83640 Precision PHYTERв„ў - IEEE 1588 Precision Time Protocol Transceiver datasheet
PDF, 1.9 Мб, Версия: F, Файл опубликован: 30 апр 2015
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Цены
 Купить DP83640 на РадиоЛоцман.Цены — от 93 до 1 929 ₽34 предложений от 23 поставщиков Ethernet контроллер, 100 Мбит/с, IEEE 1588, 3 В, 3.6 В, LQFP, 48 вывод(-ов) | |||
| DP83640TVVX/NOPB National Semiconductor | 93 ₽ | ||
| DP83640TVV/NOPB Texas Instruments | 329 ₽ | ||
| DP83640TVV/NOPB National Semiconductor | 451 ₽ | ||
| DP83640TVVX/NOPB Texas Instruments | по запросу | ||
Статус
| DP83640TVV | DP83640TVV/NOPB | DP83640TVVX/NOPB | |
|---|---|---|---|
| Статус продукта | Не рекомендуется для новых разработок | В производстве | В производстве |
| Доступность образцов у производителя | Нет | Нет | Да |
Корпус / Упаковка / Маркировка
| DP83640TVV | DP83640TVV/NOPB | DP83640TVVX/NOPB | |
|---|---|---|---|
| N | 1 | 2 | 3 |
| Pin | 48 | 48 | 48 |
| Package Type | PT | PT | PT |
| Industry STD Term | LQFP | LQFP | LQFP |
| JEDEC Code | S-PQFP-G | S-PQFP-G | S-PQFP-G |
| Package QTY | 250 | 250 | 1000 |
| Carrier | JEDEC TRAY (10+1) | JEDEC TRAY (10+1) | LARGE T&R |
| Маркировка | DP83640 | DP83640 | DP83640 |
| Width (мм) | 7 | 7 | 7 |
| Length (мм) | 7 | 7 | 7 |
| Thickness (мм) | 1.4 | 1.4 | 1.4 |
| Pitch (мм) | .5 | .5 | .5 |
| Max Height (мм) | 1.6 | 1.6 | 1.6 |
| Mechanical Data | Скачать | Скачать | Скачать |
Параметры
| Parameters / Models | DP83640TVV | DP83640TVV/NOPB | DP83640TVVX/NOPB |
|---|---|---|---|
| Cable Length, m | 150 | 150 | 150 |
| Datarate, Mbps | 10/100 | 10/100 | 10/100 |
| Function | PHY | PHY | PHY |
| Interface | MII,RMII | MII,RMII | MII,RMII |
| JTAG1149.1 | Yes | Yes | Yes |
| Рабочий диапазон температур, C | от -40 до 85 | от -40 до 85 | от -40 до 85 |
| Package Group | LQFP | LQFP | LQFP |
| Package Size: mm2:W x L, PKG | 48LQFP: 81 mm2: 9 x 9(LQFP) | 48LQFP: 81 mm2: 9 x 9(LQFP) | 48LQFP: 81 mm2: 9 x 9(LQFP) |
| Port Count | Single | Single | Single |
| Rating | Catalog | Catalog | Catalog |
| Special Features | IEEE 1588 PTP,FX Support,Cable Diagnostics | IEEE 1588 PTP,FX Support,Cable Diagnostics | IEEE 1588 PTP,FX Support,Cable Diagnostics |
| Напряжение питания, Volt | 3.3 | 3.3 | 3.3 |
Экологический статус
| DP83640TVV | DP83640TVV/NOPB | DP83640TVVX/NOPB | |
|---|---|---|---|
| RoHS | See ti.com | Совместим | Совместим |
Application Notes
- AN-1469 PHYTERВ® Design & Layout Guide (Rev. D)PDF, 289 Кб, Версия: D, Файл опубликован: 26 апр 2013
This application report describes PHYTERв„ў design and layout guidelines. - AN-1794 Using RMII Master Mode (Rev. A)PDF, 63 Кб, Версия: A, Файл опубликован: 26 апр 2013
Texas Instruments PHYTERВ® family of products incorporate the Reduced Media Independent Interface (RMII) as described in the RMII revision 1.2 specification from the RMII Consortium. This interface may be used to connect a PHY device to a MAC in 10/100 Mb/s systems using a reduced number of pins relative to standard MII. In this mode, data is transferred two bits at a time using a 50 MHz refere - IEEE 1588 Precision Time Protocol Time Synchronization Performance (Rev. A)PDF, 609 Кб, Версия: A, Файл опубликован: 26 апр 2013
This application report presents specific time synchronization results from the precision PHYTER.Histograms and oscilloscope plots of these synchronization results are provided, showing the relationshipbetween the slave clock and the master clock. - Improving Electro-Magnetic Noise Immunity in Serial Communications Systems (Rev. A)PDF, 60 Кб, Версия: A, Файл опубликован: 26 апр 2013
This application note provides key recommendations for implementing serial communication systems that exceed IEC immunity test standards. To provide an example of highly reliable serial communications system implementation and testing, a Texas Instruments DP83640 Ethernet Physical Layer device was tested for International Electrotechnical Commission (IEC) immunity test compliance. Results from the - AN-1729 DP83640 IEEE 1588 PTP Synchronized Clock Output (Rev. D)PDF, 209 Кб, Версия: D, Файл опубликован: 26 апр 2013
The DP83640 provides a highly precise, low-jitter clock output that is frequency-aligned to the masterIEEE 1588 clock and can be phase-aligned as well. Empirical testing shows very low jitter (less than 1 nspeak-to-peak and standard deviation when using the FCO source) and precise phase alignment. Whiletest results show that the FCO has superior long term jitter performance, using the PGM as - DP83640 Synchronous Ethernet Mode: Achieving Sub-ns Accuracy in PTP Applications (Rev. A)PDF, 757 Кб, Версия: A, Файл опубликован: 26 апр 2013
This application note first provides a summary of empirical results found when master to slave node synchronization is measured with Synchronous Ethernet mode enabled. Background information is then provided describing the operation of and topological constraints associated with Synchronous Ethernet mode. Typical applications are then described, followed by empirical data which clearly demonstrate - AN-2006 Synchronizing a DP83640 PTP Master to a GPS Receiver (Rev. A)PDF, 35 Кб, Версия: A, Файл опубликован: 26 апр 2013
This application report discusses methods of synchronizing the precision time protocol (PTP) clock to aGPS receiver using the DP83640 precision PHYTERв„ў. - Reducing Radiated Emissions in Ethernet 10/100 LAN Applications (Rev. A)PDF, 70 Кб, Версия: A, Файл опубликован: 26 апр 2013
This application report explains how Texas Instruments' PHYTER products help system designers toreduce radiated emissions in Ethernet 10/100 LAN applications. - IEEE 1588 Synchronization Over Standard Networks Using the DP83640 (Rev. A)PDF, 87 Кб, Версия: A, Файл опубликован: 26 апр 2013
This application report describes a method of synchronization that provides much more accuratesynchronization in systems with larger PDV. The method described attempts to detect minimum delays, or'lucky packets'. The method also takes advantage of the DP83640 clock control mechanism to separatelycontrol clock rate and time corrections, minimizing overshoot or wild swings in the accuracy of t - IEEE 1588 Boundary Clock and Transparent Clock Implementation Using the DP83640 (Rev. A)PDF, 98 Кб, Версия: A, Файл опубликован: 26 апр 2013
TIs DP83640 precision PHYTERв„ў implements time-critical portions of the IEEE 1588 Precision TimeProtocol (PTP), allowing high precision IEEE 1588 node implementations. These same features can beused to implement multi-port boundary clock (BC) and transparent clock (TC) devices as well. - AN-1540 Power Measurement of Ethernet Physical Layer Products (Rev. B)PDF, 79 Кб, Версия: B, Файл опубликован: 26 апр 2013
System designers require accurate component power consumption specifications, for the purposes of thermal management, component selection, and power distribution planning. - AN-1548 PHYTER 100 Base-TX Reference Clock Jitter Tolerance (Rev. B)PDF, 126 Кб, Версия: B, Файл опубликован: 26 апр 2013
The use of a reference clock that is less stable than those directly driven from an oscillator may be required for some applications. In addition, some customer applications may require partnering with devices that operate outside of the IEEE 802.3 standard for transmitted jitter.
Модельный ряд
Серия: DP83640 (3)
Классификация производителя
- Semiconductors> Interface> Ethernet
