Datasheet Texas Instruments SM320C6678-HIREL — Даташит
| Производитель | Texas Instruments |
| Серия | SM320C6678-HIREL |
Многоядерный процессор цифровых сигналов с фиксированной и плавающей запятой
Datasheets
SM320C6678-HIREL Multicore Fixed and Floating-Point Digital Signal Processor datasheet
PDF, 2.1 Мб, Версия: A, Файл опубликован: 3 апр 2014
Выписка из документа
 Купить SM320C6678 на РадиоЛоцман.Цены — от 35 957 до 89 726 ₽6 предложений от 6 поставщиков Цифровой сигнальный процессор DSP, DSP Fixed-Point/Floating-Point 32Bit 1GHz 841Pin FCBGA Tube | |||
| SM320C6678ACYPW Texas Instruments | 56 340 ₽ | ||
| SM320C6678ACYPW Texas Instruments | по запросу | ||
| SM320C6678ACYPW Texas Instruments | по запросу | ||
| SM320C6678ACYPW Texas Instruments | по запросу | ||
Статус
| SM320C6678ACYPW | |
|---|---|
| Статус продукта | В производстве |
| Доступность образцов у производителя | Нет |
Корпус / Упаковка / Маркировка
| SM320C6678ACYPW | |
|---|---|
| N | 1 |
| Pin | 841 |
| Package Type | CYP |
| Package QTY | 44 |
| Carrier | TUBE |
| Маркировка | W |
| Width (мм) | 24 |
| Length (мм) | 24 |
| Thickness (мм) | 2.82 |
| Mechanical Data | Скачать |
Параметры
| Parameters / Models | SM320C6678ACYPW |
|---|---|
| DSP | 8 C66x |
| DSP MHz, Max. | 1000 |
| I2C | 1 |
| On-Chip L2 Cache | 4096 KB |
| Рабочий диапазон температур, C | от -55 до 115 |
| Rating | Catalog |
| SPI | 1 |
Экологический статус
| SM320C6678ACYPW | |
|---|---|
| RoHS | Совместим |
Application Notes
- SerDes Implementation Guidelines for KeyStone I DevicesPDF, 590 Кб, Файл опубликован: 31 окт 2012
The goal of KeyStone I SerDes collateral material is to make system implementation easier for the customer by providing the system solution. For these SerDes-based interfaces, it is not assumed that the system designer is familiar with the industry specifications, SerDes technology, or RF/microwave PCB design. However, it is still expected that the PCB design work will be supervised by a knowledge - Hardware Design Guide for KeyStone Devices (Rev. C)PDF, 1.7 Мб, Версия: C, Файл опубликован: 15 сен 2013
- KeyStone I DDR3 Initialization (Rev. E)PDF, 114 Кб, Версия: E, Файл опубликован: 28 окт 2016
The initialization of the DDR3 DRAM controller on KeyStone I DSPs is straightforward as long as the proper steps are followed. However, if some steps are omitted or if some sequence-sensitive steps are implemented in the wrong order, DDR3 operation will be unpredictable.All DDR3 initialization routines must contain the basic register writes to configure the memory controller within the DSP - TMS320C66x DSP Generation of Devices (Rev. A)PDF, 245 Кб, Версия: A, Файл опубликован: 25 апр 2011
- PCIe Use Cases for KeyStone DevicesPDF, 320 Кб, Файл опубликован: 13 дек 2011
- Clocking Design Guide for KeyStone DevicesPDF, 1.5 Мб, Файл опубликован: 9 ноя 2010
- The C6000 Embedded Application Binary Interface Migration Guide (Rev. A)PDF, 20 Кб, Версия: A, Файл опубликован: 10 ноя 2010
The C6000 compiler tools support a new ELF-based ABI named EABI. Prior to this time, the compiler only supported a single ABI, which is now named COFF ABI. The following compelling best-in-class features are available under the C6000 EABI:GeneralZero-init globals: “int gvar;” gets set to 0 before main runs.Dynamic linking: Add code to a running system.Native ROM - Optimizing Loops on the C66x DSPPDF, 585 Кб, Файл опубликован: 9 ноя 2010
- DDR3 Design Requirements for KeyStone Devices (Rev. B)PDF, 582 Кб, Версия: B, Файл опубликован: 5 июн 2014
- Multicore Programming Guide (Rev. B)PDF, 1.8 Мб, Версия: B, Файл опубликован: 29 авг 2012
As application complexity continues to grow, we have reached a limit on increasing performance by merely scaling clock speed. To meet the ever-increasing processing demand, modern System-On-Chip solutions contain multiple processing cores. The dilemma is how to map applications to multicore devices. In this paper, we present a programming methodology for converting applications to run on multicore - Thermal Design Guide for DSP and ARM Application Processors (Rev. A)PDF, 324 Кб, Версия: A, Файл опубликован: 17 авг 2016
This application report has been compiled to provide specific information and considerations regarding thermal design requirements for all DSP and ARM-based single and multi-core processors (collectively referred to as “processors”, “System-on-chip”, or “SoC”). The information contained within this document is intended to provide a minimum level of understanding with regards to the thermal require
Модельный ряд
Серия: SM320C6678-HIREL (1)
Классификация производителя
- Semiconductors> Processors> Digital Signal Processors> C6000 DSP> C66x DSP
