Datasheet Texas Instruments SN74AVC16722 — Даташит
| Производитель | Texas Instruments |
| Серия | SN74AVC16722 |
22-Bit Flip-Flop With 3-State Outputs
Datasheets
22-Bit Flip-Flop With 3-State Outputs datasheet
PDF, 375 Кб, Версия: H, Файл опубликован: 29 июн 2000
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Цены
 Купить SN74AVC16722 на РадиоЛоцман.Цены — от 134 до 601 ₽19 предложений от 14 поставщиков Flip Flop D-Type Bus Interface Pos-Edge 3-ST 1Element 64Pin TSSOP T/R | |||
| SN74AVC16722DGGR Texas Instruments | от 134 ₽ | ||
| SN74AVC16722DGGR Texas Instruments | 197 ₽ | ||
| SN74AVC16722DGGR Texas Instruments | 255 ₽ | ||
| SN74AVC16722DGGR Texas Instruments | 274 ₽ | ||
Статус
| 74AVC16722DGGRE4 | SN74AVC16722DGGR | |
|---|---|---|
| Статус продукта | В производстве | В производстве |
| Доступность образцов у производителя | Да | Да |
Корпус / Упаковка / Маркировка
| 74AVC16722DGGRE4 | SN74AVC16722DGGR | |
|---|---|---|
| N | 1 | 2 |
| Pin | 64 | 64 |
| Package Type | DGG | DGG |
| Industry STD Term | TSSOP | TSSOP |
| JEDEC Code | R-PDSO-G | R-PDSO-G |
| Package QTY | 2000 | 2000 |
| Carrier | LARGE T&R | LARGE T&R |
| Маркировка | AVC16722 | AVC16722 |
| Width (мм) | 6.1 | 6.1 |
| Length (мм) | 17 | 17 |
| Thickness (мм) | 1.15 | 1.15 |
| Pitch (мм) | .5 | .5 |
| Max Height (мм) | 1.2 | 1.2 |
| Mechanical Data | Скачать | Скачать |
Параметры
| Parameters / Models | 74AVC16722DGGRE4 | SN74AVC16722DGGR |
|---|---|---|
| 3-State Output | Yes | Yes |
| Bits | 22 | 22 |
| F @ Nom Voltage(Max), Mhz | 200 | 200 |
| ICC @ Nom Voltage(Max), мА | 0.04 | 0.04 |
| Рабочий диапазон температур, C | от -40 до 85 | от -40 до 85 |
| Output Drive (IOL/IOH)(Max), мА | 12/-12 | 12/-12 |
| Package Group | TSSOP | TSSOP |
| Package Size: mm2:W x L, PKG | 64TSSOP: 138 mm2: 8.1 x 17(TSSOP) | 64TSSOP: 138 mm2: 8.1 x 17(TSSOP) |
| Rating | Catalog | Catalog |
| Schmitt Trigger | No | No |
| Technology Family | AVC | AVC |
| VCC(Max), В | 3.6 | 3.6 |
| VCC(Min), В | 1.2 | 1.2 |
| Voltage(Nom), В | 1.2,1.5,1.8,2.5,3.3 | 1.2,1.5,1.8,2.5,3.3 |
| tpd @ Nom Voltage(Max), нс | 7.7,6.3,5.4,3.3,2.6 | 7.7,6.3,5.4,3.3,2.6 |
Экологический статус
| 74AVC16722DGGRE4 | SN74AVC16722DGGR | |
|---|---|---|
| RoHS | Совместим | Совместим |
Application Notes
- Dynamic Output Control (DOC) Circuitry Technology And Applications (Rev. B)PDF, 126 Кб, Версия: B, Файл опубликован: 7 июл 1999
Texas Instruments (TI[TM]) next-generation logic is called the Advanced Very-low-voltage CMOS (AVC) family. The AVCfamily features TI?s Dynamic Output Control (DOC[TM]) circuit (patent pending). DOC circuitry automatically lowers the outputimpedance of the circuit at the beginning of a signal transition, providing enough current to achieve high signaling speeds, thensubsequently raises the i - AVC Logic Family Technology and Applications (Rev. A)PDF, 148 Кб, Версия: A, Файл опубликован: 26 авг 1998
Texas Instruments (TI?) announces the industry?s first logic family to achieve maximum propagation delays of less than 2 ns at 2.5 V. TI?s next-generation logic is the Advanced Very-low-voltage CMOS (AVC) family. Although optimized for 2.5-V systems, AVC logic supports mixed-voltage systems because it is compatible with 3.3-V and 1.8-V devices. The AVC family features TI?s Dynamic Output Control ( - Voltage Translation Between 3.3-V, 2.5-V, 1.8-V, and 1.5-V Logic Standards (Rev. B)PDF, 390 Кб, Версия: B, Файл опубликован: 30 апр 2015
- 16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)PDF, 895 Кб, Версия: B, Файл опубликован: 22 май 2002
TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa - Selecting the Right Level Translation Solution (Rev. A)PDF, 313 Кб, Версия: A, Файл опубликован: 22 июн 2004
Supply voltages continue to migrate to lower nodes to support today's low-power high-performance applications. While some devices are capable of running at lower supply nodes others might not have this capability. To haveswitching compatibility between these devices the output of each driver must be compliant with the input of the receiver that it is driving. There are several level-translati - Power-Up Behavior of Clocked Devices (Rev. A)PDF, 34 Кб, Версия: A, Файл опубликован: 6 фев 2015
Модельный ряд
Серия: SN74AVC16722 (2)
Классификация производителя
- Semiconductors> Logic> Flip-Flop/Latch/Register> D-Type Flip-Flop
