Datasheet Texas Instruments CLVTH273MNSREPG4 — Даташит
| Производитель | Texas Instruments |
| Серия | SN74LVTH273-EP |
| Модель | CLVTH273MNSREPG4 |
Enhanced Product 3.3-V Abt Octal D-Type Flip-Flops With Clear 20-SO -55 to 125
Datasheets
SN74LVTH273-EP datasheet
PDF, 649 Кб, Версия: A, Файл опубликован: 22 май 2006
Выписка из документа
Цены
 Купить CLVTH273MNSREPG4 на РадиоЛоцман.Цены — от 94 до 136 ₽7 предложений от 7 поставщиков Enhanced Product 3.3-V Abt Octal D-Type Flip-Flops With Clear 20-SO -55 to 125 | |||
| CLVTH273MNSREPG4 Texas Instruments | 94 ₽ | ||
| CLVTH273MNSREPG4 Texas Instruments | 129 ₽ | ||
| CLVTH273MNSREPG4 Texas Instruments | по запросу | ||
| CLVTH273MNSREPG4 Texas Instruments | по запросу | ||
Статус
| Статус продукта | В производстве (Рекомендуется для новых разработок) |
| Доступность образцов у производителя | Нет |
Корпус / Упаковка / Маркировка
| Pin | 20 |
| Package Type | NS |
| Industry STD Term | SOP |
| JEDEC Code | R-PDSO-G |
| Package QTY | 2000 |
| Carrier | LARGE T&R |
| Маркировка | LVTH273EP |
| Width (мм) | 5.3 |
| Length (мм) | 12.6 |
| Thickness (мм) | 1.95 |
| Pitch (мм) | 1.27 |
| Max Height (мм) | 2 |
| Mechanical Data | Скачать |
Параметры
| 3-State Output | No |
| Bits | 8 |
| F @ Nom Voltage(Max) | 160 Mhz |
| ICC @ Nom Voltage(Max) | 5 мА |
| Тип входа | TTL |
| Рабочий диапазон температур | от -55 до 125 C |
| Output Drive (IOL/IOH)(Max) | 64/-32 мА |
| Тип выхода | TTL |
| Package Group | SO |
| Package Size: mm2:W x L | 20SO: 98 mm2: 7.8 x 12.6(SO) PKG |
| Rating | HiRel Enhanced Product |
| Technology Family | LVT |
| VCC(Max) | 3.6 В |
| VCC(Min) | 2.7 В |
| tpd @ Nom Voltage(Max) | 4.9 нс |
Экологический статус
| RoHS | Совместим |
Application Notes
- LVT Family Characteristics (Rev. A)PDF, 98 Кб, Версия: A, Файл опубликован: 1 мар 1998
To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti - LVT-to-LVTH ConversionPDF, 84 Кб, Файл опубликован: 8 дек 1998
Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed. - 16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)PDF, 895 Кб, Версия: B, Файл опубликован: 22 май 2002
TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa - Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)PDF, 105 Кб, Версия: A, Файл опубликован: 1 авг 1997
The spectrum of bus-interface devices with damping resistors or balanced/light output drive currently offered by various logic vendors is confusing at best. Inconsistencies in naming conventions and methods used for implementation make it difficult to identify the best solution for a given application. This report attempts to clarify the issue by looking at several vendors? approaches and discussi - Understanding Advanced Bus-Interface Products Design GuidePDF, 253 Кб, Файл опубликован: 1 май 1996
- Power-Up 3-State (PU3S) Circuits in TI Standard Logic DevicesPDF, 209 Кб, Файл опубликован: 10 май 2002
Many telecom and networking applications require that cards be inserted and extracted from a live backplane without interrupting data or damaging components. To achieve this interface terminals of the card must be electrically isolated from the bus system during insertion or extraction from the backplane. To facilitate this Texas Instruments provides bus-interface and logic devices with features - Power-Up Behavior of Clocked Devices (Rev. A)PDF, 34 Кб, Версия: A, Файл опубликован: 6 фев 2015
Модельный ряд
Серия: SN74LVTH273-EP (3)
- CLVTH273MNSREPG4 SN74LVTH273MNSREP V62/04674-02YE
Классификация производителя
- Semiconductors > Space & High Reliability > Logic Products > Flip-Flop/Latch/Registers
