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Datasheet Texas Instruments THS1030 — Даташит

ПроизводительTexas Instruments
СерияTHS1030
Datasheet Texas Instruments THS1030

10-Bit, 30-MSPS Analog-to-Digital Converter (ADC)

Datasheets

3-V to 5.5-V 10-Bit, 30 MSPS CMOS Analog-to-Digital Converter datasheet
PDF, 1.0 Мб, Версия: E, Файл опубликован: 30 окт 2003
Выписка из документа
3-V to 5.5-V 10-Bit, 30 MSPS CMOS Analog-to-Digital Converter (Rev. E)
PDF, 1.1 Мб, Версия: E, Файл опубликован: 30 окт 2003

Цены

23 предложений от 20 поставщиков
Аналого-цифровые преобразователи (АЦП) 10-Bit 30 MSPS 1-Ch Pin Comp
EIS Components
Весь мир
THS1030IDWRG4
Texas Instruments
75 ₽
Akcel
Весь мир
THS1030IPWR
Texas Instruments
от 106 ₽
AiPCBA
Весь мир
THS1030CDWR
Texas Instruments
482 ₽
ЭИК
Россия
THS1030CDW
Texas Instruments
1 311 ₽
Выбираем схему BMS для заряда литий-железофосфатных (LiFePO4) аккумуляторов

Статус

THS1030CDWTHS1030CDWG4THS1030CDWRTHS1030CPWTHS1030CPWRTHS1030IDWTHS1030IPWTHS1030IPWRTHS1030IPWRG4
Статус продуктаСнят с производстваСнят с производстваСнят с производстваВ производствеВ производствеСнят с производстваВ производствеВ производствеВ производстве
Доступность образцов у производителяНетНетНетНетНетНетНетНетНет

Корпус / Упаковка / Маркировка

THS1030CDWTHS1030CDWG4THS1030CDWRTHS1030CPWTHS1030CPWRTHS1030IDWTHS1030IPWTHS1030IPWRTHS1030IPWRG4
N123456789
Pin282828282828282828
Package TypeDWDWDWPWPWDWPWPWPW
Industry STD TermSOICSOICSOICTSSOPTSSOPSOICTSSOPTSSOPTSSOP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-G
МаркировкаTH1030TH1030TH1030TH1030TJ1030TJ1030TJ1030TJ1030
Width (мм)7.57.57.54.44.47.54.44.44.4
Length (мм)17.917.917.99.79.717.99.79.79.7
Thickness (мм)2.352.352.35112.35111
Pitch (мм)1.271.271.27.65.651.27.65.65.65
Max Height (мм)2.652.652.651.21.22.651.21.21.2
Mechanical DataСкачатьСкачатьСкачатьСкачатьСкачатьСкачатьСкачатьСкачатьСкачать
Package QTY5020005020002000
CarrierTUBELARGE T&RTUBELARGE T&RLARGE T&R

Параметры

Parameters / ModelsTHS1030CDW
THS1030CDW
THS1030CDWG4
THS1030CDWG4
THS1030CDWR
THS1030CDWR
THS1030CPW
THS1030CPW
THS1030CPWR
THS1030CPWR
THS1030IDW
THS1030IDW
THS1030IPW
THS1030IPW
THS1030IPWR
THS1030IPWR
THS1030IPWRG4
THS1030IPWRG4
# Input Channels111111111
Analog Input BW, МГц150150150150
Analog Input BW(MHz)150150150150150
Approx. Price (US$)6.94 | 100u6.94 | 100u6.94 | 100u6.94 | 100u6.94 | 100u
АрхитектураPipelinePipelinePipelinePipelinePipelinePipelinePipelinePipelinePipeline
DNL(Max), +/-LSB1111
DNL(Max)(+/-LSB)11111
DNL(Typ), +/-LSB0.30.30.30.3
ENOB, Bits9999
ENOB(Bits)7.87.87.87.87.8
INL(Max), +/-LSB2222
INL(Max)(+/-LSB)22222
INL(Typ), +/-LSB1111
Input BufferNoNoNoNoNoNoNoNo
Input Range2V (p-p)2V (p-p)2V (p-p)222V (p-p)222V (p-p)
InterfaceParallel CMOSParallel CMOSParallel CMOSParallel CMOSParallel CMOSParallel CMOSParallel CMOSParallel CMOSParallel CMOS
Рабочий диапазон температур, Cот -40 до 85,0 до 70от -40 до 85,0 до 70от -40 до 85,0 до 70от -40 до 85,0 до 70
Operating Temperature Range(C)-40 to 85
0 to 70
-40 to 85
0 to 70
-40 to 85
0 to 70
-40 to 85
0 to 70
-40 to 85
0 to 70
Package GroupTSSOPTSSOPTSSOPTSSOPTSSOPTSSOPTSSOPTSSOPTSSOP
Package Size(mm2=WxL)28TSSOP: 62 mm2: 6.4 x 9.7
Package Size: mm2:W x L, PKG28TSSOP: 62 mm2: 6.4 x 9.7(TSSOP)28TSSOP: 62 mm2: 6.4 x 9.7(TSSOP)28TSSOP: 62 mm2: 6.4 x 9.7(TSSOP)28TSSOP: 62 mm2: 6.4 x 9.7(TSSOP)
Package Size: mm2:W x L (PKG)28TSSOP: 62 mm2: 6.4 x 9.7(TSSOP)28TSSOP: 62 mm2: 6.4 x 9.7(TSSOP)28TSSOP: 62 mm2: 6.4 x 9.7(TSSOP)28TSSOP: 62 mm2: 6.4 x 9.7(TSSOP)
Power Consumption(Typ), mW150150150150
Power Consumption(Typ)(mW)150150150150150
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Reference ModeExt
Int
Ext
Int
Ext
Int
Ext,IntExt,IntExt
Int
Ext,IntExt,IntInt
Ext
Разрешение, Bits10101010
Resolution(Bits)1010101010
SFDR, дБ53535353
SFDR(dB)5353535353
SINAD, дБ48.648.648.648.6
SINAD(dB)48.648.648.648.648.6
SNR, дБ49.449.449.449.4
SNR(dB)49.449.449.449.449.4
Sample Rate (max)(SPS)30MSPS
Sample Rate(Max), MSPS30303030
Sample Rate(Max)(MSPS)30303030

Экологический статус

THS1030CDWTHS1030CDWG4THS1030CDWRTHS1030CPWTHS1030CPWRTHS1030IDWTHS1030IPWTHS1030IPWRTHS1030IPWRG4
RoHSНе совместимНе совместимНе совместимСовместимСовместимНе совместимСовместимСовместимСовместим
Бессвинцовая технология (Pb Free)НетДаНетНетНет

Application Notes

  • CDCE62005 as Clock Solution for High-Speed ADCs
    PDF, 805 Кб, Файл опубликован: 4 сен 2008
    TI has introduced a family of devices well-suited to meet the demands for high-speed ADC devices such as the ADS5527 which is capable of sampling up to 210 MSPS. To realize the full potential of these high-performance products it is imperative to provide a low phase noise clock source. The CDCE62005 clock synthesizer chip offers a real-world clocking solution to meet these stringent requirements
  • Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio
    PDF, 376 Кб, Файл опубликован: 28 апр 2009
    This application report explains different aspects of selecting analog-to-digital and digital-to-analog data converters for Software-Defined Radio (SDR) applications. It also explains how ADS61xx ADCs and the DAC5688 from Texas Instruments fit properly for SDR designs.
  • Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A)
    PDF, 327 Кб, Версия: A, Файл опубликован: 10 сен 2010
    This application report discusses the performance-related aspects of passive and active interfaces at the analog input of high-speed pipeline analog-to-digital converters (ADCs). The report simplifies the many possibilities into two main categories: passive and active interface circuits. The first section of the report gives an overview of equivalent models of buffered and unbuffered ADC input cir
  • Phase Noise Performance and Jitter Cleaning Ability of CDCE72010
    PDF, 2.3 Мб, Файл опубликован: 2 июн 2008
    This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the reference clock VCXO clock and the CDCE72010 itself. This application report shows the phase noise performance at several of the most popular CDMA frequencies. This data helps the user to choose the rig
  • CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters
    PDF, 424 Кб, Файл опубликован: 8 июн 2008
    Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483 which is capable of sampling up to 135 MSPS. To realize the full potential of these high-performance devices the system must provide an extremely low phase noise clock source. The CDCE72010 clock synthesizer chip offers
  • Noise Analysis for High Speed Op Amps (Rev. A)
    PDF, 256 Кб, Версия: A, Файл опубликован: 17 янв 2005
    As system bandwidths have increased an accurate estimate of the noise contribution for each element in the signal channel has become increasingly important. Many designers are not however particularly comfortable with the calculations required to predict the total noise for an op amp or in the conversions between the different descriptions of noise. Considerable inconsistency between manufactu
  • CDCE62005 as Clock Solution for High-Speed ADCs
    PDF, 805 Кб, Файл опубликован: 4 сен 2008
    TI has introduced a family of devices well-suited to meet the demands for high-speed ADC devices such as the ADS5527, which is capable of sampling up to 210 MSPS. To realize the full potential of thes
  • Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio
    PDF, 376 Кб, Файл опубликован: 28 апр 2009
    This application report explains different aspects of selecting analog-to-digital and digital-to-analog data converters for Software-Defined Radio (SDR) applications. It also explains how ADS61xx ADCs
  • Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A)
    PDF, 327 Кб, Версия: A, Файл опубликован: 10 сен 2010
    This application report discusses the performance-related aspects of passive and active interfaces at the analog input of high-speed pipeline analog-to-digital converters (ADCs). The report simplifies
  • Phase Noise Performance and Jitter Cleaning Ability of CDCE72010
    PDF, 2.3 Мб, Файл опубликован: 2 июн 2008
    This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the refe
  • CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters
    PDF, 424 Кб, Файл опубликован: 8 июн 2008
    Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed, high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483, which is capable of
  • Noise Analysis for High Speed Op Amps (Rev. A)
    PDF, 256 Кб, Версия: A, Файл опубликован: 17 янв 2005
    As system bandwidths have increased, an accurate estimate of the noise contribution for each element in the signal channel has become increasingly important. Many designers are not, however, particula

Модельный ряд

Классификация производителя

  • Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> High Speed ADCs (>10MSPS)

На английском языке: Datasheet Texas Instruments THS1030

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