Datasheet Microchip MCP3911A0-E/ML — Даташит

MCP3911
3.3V Two-Channel Analog Front End
Features Description Two Synchronous Sampling 16/24-bit Resolution
Delta-Sigma A/D Converters 94.5 dB SINAD, -106.5 dBc Total Harmonic
Distortion (THD) (up to 35th harmonic), 111 dB
SFDR for Each Channel 2.7V – 3.6V AVDD, DVDD Programmable Data Rate up to 125 ksps
-4 MHz Maximum Sampling Frequency Oversampling Ratio up to 4096 Ultra Low Power Shutdown Mode with <2 ВµA -122 dB Crosstalk between the Two Channels Low Drift 1.2V Internal Voltage Reference: 7 ppm/В°C Differential Voltage Reference Input Pins High Gain Programmable Gain Amplifier (PGA)
on Each Channel (up to 32V/V) Phase Delay Compensation with 1 Вµs Time
Resolution Separate Modulator Output Pins for Each
Channel Separate Data Ready Pin for Easy
Synchronization Individual 24-bit Digital Offset and Gain Error
Correction for Each Channel High-Speed 20 MHz SPI Interface with Mode 0,0
and 1,1 Compatibility Continuous Read/Write Modes for Minimum
Communication Low Power Consumption (8.9 mW at 3.3V,
5.6 mW at 3.3V in low-power mode, typical) Available in Small 20-lead QFN and SSOP
Packages, Pin-to-pin Compatible with MCP3901 Extended Temperature Range: -40В°C to +125В°C The MCP3911 is a 2.7V to 3.6V dual channel Analog
Front End (AFE) containing two synchronous sampling
Delta-Sigma Analog-to-Digital Converters (ADC), two
PGAs, phase delay compensation block, low-drift
internal voltage reference, modulator output block,
digital offset and gain errors calibration registers and
high-speed 20 MHz SPI compatible serial interface. RESET
DVDD …