PROCESS CPD73 Bridge Rectifier
Monolithic Quad Diode Bridge Chip PROCESS DETAILS
Die Size 25 x 25 MILS Die Thickness 6.0 MILS Bonding Pad Area 1 (+DC) 3.0 x 3.0 MILS Bonding Pad Area 2 (AC) 3.0 x 7.0 MILS Bonding Pad Area 3 (-DC) 3.0 x 4.0 MILS Bonding Pad Area 4 (AC) 3.0 x 7.0 MILS Top Side Metalization Al -12,000Å Back Side Metalization Au -5,000Å GEOMETRY
GROSS DIE PER 3 INCH WAFER
10,000
PRINCIPAL DEVICE TYPES
CMFBR-6F R2 (22-March 2010)
w w w. c e n t r a l s e m i . c o m PROCESS CPD73 Typical Electrical Characteristics R2 (22-March 2010)
w w w. c e n t r a l s e m i . c o m BARE DIE PACKING OPTIONS BARE DIE IN TRAY (WAFFLE) PACK
CT: Singulated die in tray (waffle) pack.
(example: CP211-PART NUMBER-CT) CM: S ingulated die in tray (waffle) pack 100% visually inspected as
per MIL-STD-750, (method 2072 transistors, method 2073 diodes).
(example: CP211-PART NUMBER-CM) UNSAWN WAFER
WN: Full wafer, unsawn, 100% tested with reject die inked.
(example: CP211-PART NUMBER-WN) SAWN WAFER ON PLASTIC RING
WR: F ull wafer, sawn and mounted on plastic ring,
100% tested with reject die inked.
(example: CP211-PART NUMBER-WR) Please note: Sawn Wafer on Metal Frame (WS)
is possible as a special order. Please contact your
Central Sales Representative at 631-435-1110.
Visit the Central website for a complete listing of specifications:
www.centralsemi.com/bdspecs
R2 (3-April 2017) …
