LTC1408 6 Channel, 14-Bit, 600ksps Simultaneous Sampling ADC U with Shutdown FEATURESDESCRIPTIO ■ 600ksps ADC with 6 Simultaneously Sampled The LTC®1408 is a 14-bit, 600ksps ADC with six simulta- Differential Inputs neously sampled differential inputs. The device draws ■ 100ksps Throughput per Channel only 5mA from a single 3V supply, and comes in a tiny 32 ■ 76dB SINAD pin (5mm × 5mm) QFN package. A SLEEP shutdown ■ Low Power Dissipation: 15mW feature lowers power consumption to 6µW. The combina- ■ 3V Single Supply Operation tion of low power and tiny package makes the LTC1408 ■ 2.5V Internal Bandgap Reference, Can be Overdriven suitable for portable applications. with External Reference The LTC1408 contains six separate differential inputs that ■ 3-Wire Serial Interface are sampled simultaneously on the rising edge of the ■ Internal Conversion Triggered by CONV CONV signal. These six sampled inputs are then ■ SLEEP (6µW) Shutdown Mode converted at a rate of 100ksps per channel. ■ NAP (3.3mW) Shutdown Mode The 90dB common mode rejection allows users to ■ 0V to 2.5V Unipolar, or ±1.25V Bipolar Differential eliminate ground loops and common mode noise by Input Range measuring signals differentially from the source. ■ 90dB Common Mode Rejection ■ Tiny 32-Pin (5mm × 5mm) QFN Package The device converts 0V to 2.5V unipolar inputs differen- tially, or U ±1.25V bipolar inputs also differentially, APPLICATIO S depending on the state of the BIP pin. Any analog input may swing rail-to-rail as long as the differential input ■ Multiphase Power Measurement range is maintained. ■ Multiphase Motor Control The conversion sequence can be abbreviated to convert ■ Data Acquisition Systems fewer than six channels, depending on the logic state of ■ Uninterruptable Power Supplies the SEL2, SEL1 and SEL0 inputs. , LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All The serial interface sends out the six conversion results in other trademarks are the property of their respective owners. Protected by U.S. Patents including 6084440, 6522187. 96 clocks for compatibility with standard serial interfaces. WBLOCK DIAGRA CH4– CH4+ CH5– CH5+ CH2– CH2+ CH3– CH3+ CH0– CH0+ CH1– CH1+ 10µF 3V VCC VDD 21 20 19 18 17 16 15 14 12 11 10 9 8 7 6 5 4 24 25 13 + + + + + + 14-BIT LATCH 0 – – – – – – OV 3 DD 14-BIT LATCH 1 THREE- 3V S AND H S AND H S AND H S AND H S AND H S AND H STATE 600ksps 14-BIT LATCH 2 SD0 SERIAL 1 14-BIT ADC 14-BIT LATCH 3 OUTPUT 0.1µF 14-BIT LATCH 4 PORT 2 14-BIT LATCH 5 OGND MUX TIMING 30 CONV 2.5V LOGIC REFERENCE 32 SCK 31 DGND GND VREF 33 22 23 29 26 27 28 10µF BIP SEL2 SEL1 SEL0 1408 TA01 1408fa 1
