LTC1594L/LTC1598L AC CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range,otherwise specifications are at TA = 25 ° C.(Note 5)SYMBOLPARAMETERCONDITIONSMINTYPMAXUNITS tSMPL Analog Input Sample Time See Figure 1 in Applications Information 1.5 CLK Cycles fSMPL(MAX) Maximum Sampling Frequency See Figure 1 in Applications Information ● 10.5 kHz tCONV Conversion Time See Figure 1 in Applications Information 12 CLK Cycles tdDO Delay Time, CLK↓ to DOUT Data Valid See Test Circuits ● 600 1500 ns tdis Delay Time, CS↑ to DOUT Hi-Z See Test Circuits ● 220 600 ns ten Delay Time, CLK↓ to DOUT Enabled See Test Circuits ● 180 500 ns thDO Time Output Data Remains Valid After CLK↓ CLOAD = 100pF 520 ns tf DOUT Fall Time See Test Circuits ● 60 180 ns tr DOUT Rise Time See Test Circuits ● 80 180 ns tON Enable Turn-On Time See Figure 1 in Applications Information ● 540 1200 ns tOFF Enable Turn-Off Time See Figure 2 in Applications Information ● 190 500 ns tOPEN Break-Before-Make Interval ● 125 350 ns CIN Input Capacitance Analog Inputs On-Channel 20 pF Off-Channel 5 pF Digital Input 5 pF Note 1: Absolute Maximum Ratings are those values beyond which the life Note 7: Two on-chip diodes are tied to each reference and analog input of a device may be impaired. which will conduct for reference or analog input voltages one diode drop Note 2: All voltage values are with respect to GND. below GND or one diode drop above VCC. This spec allows 50mV forward Note 3: These devices are specified at 3V. Consult factory for 5V bias of either diode for 2.7V ≤ VCC ≤ 3.6V. This means that as long as the specified devices (LTC1594/LTC1598). reference or analog input does not exceed the supply voltage by more than 50mV, the output code will be correct. To achieve an absolute 0V to 3V Note 4: Increased leakage currents at elevated temperatures cause the S/H input voltage range, it will therefore require a minimum supply voltage of to droop, therefore it is recommended that fCLK ≥ 200kHz at 85°C, 2.950V over initial tolerance, temperature variations and loading. fCLK ≥ 75kHz at 70°C and fCLK ≥ 1kHz at 25°C. Note 8: Recommended operating condition. Note 5: VCC = 2.7V, VREF = 2.5V and CLK = 200kHz unless otherwise specified. CSADC and CSMUX pins are tied together during the test. Note 9: Channel leakage current is measured after the channel selection. Note 6: Linearity error is specified between the actual end points of the A/D transfer curve. WUTYPICAL PERFORMANCE CHARACTERISTICSSupply Current vs Sample RateSupply Current vs TemperatureReference Current vs Temperature 1000 260 53 TA = 25°C T V A = 25°C CC = 2.7V V 52 CC = 2.7V V V CC = 2.7V REF = 2.5V VREF = 2.5V f 220 VREF = 2.5V 51 CLK = 200kHz fCLK = 200kHz f f CLK = 200kHz µA) SMPL = 10.5kHz µA) µA) f 50 100 SMPL = 10.5kHz 180 49 48 140 47 10 46 SUPPLY CURRENT ( SUPPLY CURRENT ( REFERENCE CURRENT ( 100 45 44 1 60 43 0.1 1 10 100 – 55 – 35 –15 5 25 45 65 85 105 125 –55 –35 –15 5 25 45 65 85 105 125 SAMPLE FREQUENCY (kHz) TEMPERATURE (°C) TEMPERATURE (°C) 1594L/98L G01 1594L/98L G02 1594L/98L G03 15948lfb 4
