link to page 1 link to page 1 link to page 1 link to page 1 link to page 2 link to page 3 link to page 6 link to page 6 link to page 6 link to page 7 link to page 8 link to page 15 link to page 15 link to page 15 link to page 16 link to page 16 link to page 16 link to page 17 link to page 17 link to page 18 link to page 18 link to page 19 link to page 19 link to page 20 link to page 20 link to page 20 link to page 22 link to page 23 AD8222Data SheetTABLE OF CONTENTS Features .. 1 Package Considerations ... 16 Applications ... 1 Layout .. 16 Functional Block Diagram .. 1 Input Bias Current Return Path ... 17 General Description ... 1 Input Protection ... 18 Revision History ... 2 RF Interference ... 18 Specifications ... 3 Common-Mode Input Voltage Range ... 18 Absolute Maximum Ratings .. 6 Applications Information .. 19 Thermal Resistance .. 6 Differential Output .. 19 ESD Caution .. 6 Driving a Differential Input ADC .. 20 Pin Configuration and Function Descriptions ... 7 Precision Strain Gage ... 20 Typical Performance Characteristics ... 8 Driving Cabling .. 21 Theory of Operation .. 15 Outline Dimensions ... 22 Amplifier Architecture .. 15 Ordering Guide .. 23 Gain Selection ... 15 Reference Terminal .. 16 REVISION HISTORY 5/2016—Rev. A to Rev. B Changes to Thermal Resistance Section and Table 6 ... 6 Changed CP-16-13 to CP-16-26 .. Throughout Changes to Figure 2 ... 7 Change to Table 5 ... 6 Changes to Figure 19 .. 10 Changes to Figure 2 and Table 7 ... 7 Changes to Figure 43 .. 14 Added Figure 3; Renumbered Sequentially .. 7 Changes to Reference Terminal Section, Figure 45, and Package Change to Input Protection Section ... 18 Considerations Section .. 16 Updated Outline Dimensions ... 22 Deleted Thermal Pad Section ... 16 Changes to Ordering Guide .. 23 Added Package Without Thermal Pad and Package with Thermal Pad Sections .. 16 2/2010—Rev. 0 to Rev. A Changes to Figure 46 .. 17 Added LFCSP_VQ, CP-16-13 Package .. Universal Deleted Solder Wash Section .. 17 Changes to Features Section and Table 1 .. 1 Changes to RFI and Antialising Filter Section ... 20 Changed VIN+ to V+IN, VIN− to V−IN, and T to TA Throughout ... 3 Updated Outline Dimensions ... 22 Change to Reference Input Parameter, Table 2 ... 4 Changes to Ordering Guide .. 23 Changed Output Short-Circuit Current to Output Short-Circuit Duration, Table 5 .. 6 7/2006—Revision 0: Initial Version Rev. B | Page 2 of 24 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Maximum Power Dissipation ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION AMPLIFIER ARCHITECTURE GAIN SELECTION REFERENCE TERMINAL PACKAGE CONSIDERATIONS Package Without Thermal Pad Package with Thermal Pad LAYOUT Common-Mode Rejection Over Frequency Reference Power Supplies INPUT BIAS CURRENT RETURN PATH INPUT PROTECTION Input Voltages Beyond the Rails Differential Input Voltages at High Gains RF INTERFERENCE COMMON-MODE INPUT VOLTAGE RANGE APPLICATIONS INFORMATION DIFFERENTIAL OUTPUT Setting the Common-Mode Voltage 2-Channel Differential Output Using a Dual Op Amp DRIVING A DIFFERENTIAL INPUT ADC RFI and Antialiasing Filter Second Antialiasing Filter Reference PRECISION STRAIN GAGE DRIVING CABLING OUTLINE DIMENSIONS ORDERING GUIDE
