Datasheet LM3S5C31-IQC80-A1T - Texas Instruments Даташит Микроконтроллеры (MCU) ИС ARM Cortex-M3 микроконтроллер — Даташит
Наименование модели: LM3S5C31-IQC80-A1T
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LM3S5C31-IQC80-A1T Texas Instruments | по запросу | ||
LM3S5C31-IQC80-A1T Texas Instruments | по запросу |
Подробное описание
Производитель: Texas Instruments
Описание: Микроконтроллеры (MCU) ИС ARM Cortex-M3 микроконтроллер
Краткое содержание документа:
S T E L L A R I S E R R ATA
Stellaris LM3S5C31 RevA2 Errata
This document contains known errata at the time of publication for the Stellaris LM3S5C31 microcontroller.
The table below summarizes the errata and lists the affected revisions. See the data sheet for more details. See also the ARM® CortexTM-M3 errata, ARM publication number PR326-PRDC-009450 v2.0. Table 1. Revision History
Date June 2012 Revision 2.1 Description March 2011 2.0 Clarified how to read the date code on Stellaris devices. Clarified wording of issue "USB0DM may be driven after reset" on page 22. Removed issue "The Reset Cause register always reports POR regardless of reset type" as it does not affect this device. Added issue "The ROM_FlashProgram() function may not correctly program the Flash memory above 50 MHz" on page 9. Added issue "In Host-Bus 16 mode, only one byte select is asserted if only 8 bits are read" on page 12. Added issue "When non-blocking reads are pending, EPI accesses can cause the NBRFIFO c
Спецификации:
- Шина данных: 32 бит
- Ядро: ARM Cortex
Варианты написания:
LM3S5C31IQC80A1T, LM3S5C31 IQC80 A1T