LMS6002D
Multi-band Multi-standard Transceiver with Integrated Dual DACs and ADCs
SUMMARY FEATURES Single chip transceiver covering 0.3-3.8GHz frequency range Digital interface to baseband with integrated 12 bit D/A and A/D converters Fully differential baseband signals Few external components Programmable modulation bandwidth: 1.5, 1.75, 2.5, 2.75, 3, 3.84, 5, 5.5, 6, 7, 8.75, 10, 12, 14, 20 and 28MHz Supports both TDD and FDD operation modes Low voltage operation, 1.8V and 3.3V 120 pin DQFN package Power down option Serial port interface APPLICATIONS Femtocell and Picocell base stations Repeaters Broadband wireless communication devices for WCDMA/HSPA, LTE, GSM, CDMA2000, IEEE® 802.16x radios PLLCLKOUT 2 TXINI TXINQ 2 PLLCLK TX Power Control TX Gain Control TXVGA2 TXMIX PA1 TXOUT2 2 TXOUT1 IQ DACs DEMUX TXD[11:0] TX_IQ_SEL 12 12 TXLPF TXVGA1 DAC LO Leakage IDAC QDAC 12 TX_CLK RX_CLK_OUT RX_CLK 12
/2 /2 DAC 0o 90o PA2 AUXPA 2 TXPLL RXPLL
0o 90o RF loopback LMS6002D LNA1 LNA2 LNA3 RXLNA 2 RXIN1 2 RXIN2 RXIN3 MUX RX_IQ_SEL RXD[11:0] IADC QADC IQ ADCs RXVGA2 RXOUTSW 2 2 RXLPF RXVGA1 RXMIX RX Gain Control 12 12 2 RX Power Control SPI RXOUTI RXOUTQ Figure 1: Functional block diagram GENERAL DESCRIPTION
The LMS6002D is a fully integrated, multi-band, multi-standard RF transceiver for 3GPP (WCDMA/HSPA, LTE), 3GPP2 (CDMA2000) and 4G LTE applications, as well as for GSM pico BTS. It combines the Document version: 1.1.0 Last modified: 03/12/2012 © Copyright Lime Microsystems LNA, PA driver, RX/TX mixers, RX/TX filters, synthesizers, RX gain control, and TX power control with very few external components. The information contained in this document is subject to change without prior notice. Lime Microsystems assumes no responsibility for its use, nor for infringement of patents or other rights of third parties. Lime Microsystems' standard terms and conditions apply at all times. SEN SCLK SDIO SDO LMS6002D - Multi-band Multi-standard Transceiver with Integrated Dual DACs and ADCs
The top level architecture of LMS6002D transceiver is shown in Figure 1. Both transmitter and receiver are implemented as zero IF architectures providing up to 28MHz modulation bandwidth (equivalent to 14MHz baseband IQ bandwidth). mixed with the receive PLL (RXPLL) output to directly down convert to baseband. Large AGC steps can be implemented by an IF amplifier (RXVGA1) prior to the programmable bandwidth lowpass channel select filters (RXLPF). The received IQ signal is further amplified by a programmable gain amplifier RXVGA2. DC offset is applied at the input of RXVGA2 to prevent satura …
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