Philips Semiconductors Product specification N-channel TrenchMOSTM transistor IRF530N FEATURES 'Trench' technology Low on-state resistance Fast switching Low thermal resistance SYMBOL
d QUICK REFERENCE DATA VDSS = 100 V ID = 17 A
g RDS(ON) 110 m
s GENERAL DESCRIPTION
N-channel enhancement mode field-effect power transistor in a plastic envelope using 'trench' technology. Applications: d.c. to d.c. converters switched mode power supplies The IRF530N is supplied in the SOT78 (TO220AB) conventional leaded package. PINNING
PIN 1 2 3 tab gate drain source drain DESCRIPTION SOT78 (TO220AB)
tab drain 1 2 3 gate source drain LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER VDSS VDGR VGS ID IDM PD Tj, Tstg Drain-source voltage Drain-gate voltage Gate-source voltage Continuous drain current Pulsed drain current Total power dissipation Operating junction and storage temperature CONDITIONS Tj = 25 °C to 175°C Tj = 25 °C to 175°C; RGS = 20 k Tmb = 25 °C; VGS = 10 V Tmb = 100 °C; VGS = 10 V Tmb = 25 °C Tmb = 25 °C MIN. -55 MAX. 100 100 ± 20 17 12 68 79 175 UNIT V V V A A A W °C AVALANCHE ENERGY LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER EAS Non-repetitive avalanche energy Peak non-repetitive avalanche current CONDITIONS Unclamped inductive load, IAS = 7.8 A; tp = 300 µs; Tj prior to avalanche = 25°C; VDD 25 V; RGS = 50 ; VGS = 10 V; refer to fig:14 MIN. MAX. 150 UNIT mJ IAS -17 A August 1999 1 Rev 1.100 Philips Semiconductors Product specification N-channel TrenchMOSTM transistor IRF530N THERMAL RESISTANCES
SYMBOL PARAMETER Rth j-mb Rth j-a Thermal resistance junction to mounting base Thermal resistance junction to ambient CONDITIONS MIN. SOT78 package, in free air TYP. MAX. UNIT 60 1.9 K/W K/W ELECTRICAL CHARACTERISTICS
Tj= 25°C unless otherwise specified SYMBOL PARAMETER V(BR)DSS VGS(TO) RDS(ON) gfs IGSS IDSS Qg(tot) Qgs Qgd td on tr td off tf Ld Ld Ls Ciss Coss Crss Drain-source breakdown voltage Gate threshold voltage Drain-source on-state resistance Forward transconductance Gate source leakage current Zero gate voltage drain current Total gate charge Gate-source charge Gate-drain (Miller) charge Turn-on delay time Turn-on rise time Turn-off delay time Turn-off fall time Internal drain inductance Internal drain inductance Internal source inductance Input capacitance Output capacitance Feedback capacitance CONDITIONS VGS = 0 V; ID = 0.25 mA; Tj = -55°C VDS = VGS; ID = 1 mA Tj = 175°C Tj = -55°C VGS = 10 V; ID = 9 A Tj = 175°C VDS = 25 V; ID = 9 A …
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