Datasheet ТI SN74BCT640N — Даташит

 
 




 
SCBS025C -SEPTEMBER 1988 -REVISED APRIL 1994 SN54BCT640 . J OR W PACKAGE
SN74BCT640 . DW OR N PACKAGE
(TOP VIEW) State-of-the-Art BiCMOS Design
Substantially Reduces Standby Current
Outputs Have Undershoot-Protection
Circuitry
Power-Up High-Impedance State
Buffered Control Inputs to Reduce DC
Loading Effects
ESD Protection Exceeds 2000 V
Per MIL-STD-883C, Method 3015
Package Options Include Plastic
Small-Outline (DW) Packages, Ceramic
Chip Carriers (FK) and Flatpacks (W), and
Plastic and Ceramic 300-mil DIPs (J, N) DIR
A1
A2
A3
A4
A5
A6
A7 …