Datasheet ТI SN64BCT25244DW — Даташит

 
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 SCBS477 -DECEMBER 1992 -REVISED JANUARY 1994 DW OR NT PACKAGE
(TOP VIEW) State-of-the-Art BiCMOS Design
Significantly Reduces ICCZ
High-Impedance State During Power Up and
Power Down
ESD Protection Exceeds 2000 V Per
MIL-STD-883C, Method 3015; Exceeds
200 V Using Machine Model (C = 200 pF,
R = 0)
Designed to Facilitate Incident-Wave
Switching for Line Impedances of 25 Ω or
Greater
Distributed VCC and GND Pins Minimize
Noise Generated by the Simultaneous
Switching of Outputs
Package Options Include Plastic
Small-Outline (DW) Packages and Standard
Plastic 300-mil DIPs (NT) 1Y1
GND
1Y2 …