Datasheet Texas Instruments ADS8413IBRGZT — Даташит
| Производитель | Texas Instruments |
| Серия | ADS8413 |
| Модель | ADS8413IBRGZT |
16-разрядный униполярный дифференциальный вход, частота дискретизации 2 MSPS, АЦП от 4,75 до 5,25 В с последовательным интерфейсом LVDS 48-VQFN от -40 до 85
Datasheets
16-Bit, 2-MSPS, LVDS Serial Interface, SAR ADC datasheet
PDF, 1.6 Мб, Файл опубликован: 6 окт 2005
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Цены
 Купить ADS8413IBRGZT на РадиоЛоцман.Цены — от 1 098 до 229 433 ₽20 предложений от 15 поставщиков Микросхема Преобразователь AD, 16Bit, Unipolar Diff Input, 2MSPS Sampling rate, 4.75V to 5.25V ADC with LVDS Serial Interface 48-VQFN -40℃ to... | |||
| ADS8413IBRGZT Texas Instruments | 1 098 ₽ | ||
| ADS8413IBRGZT Texas Instruments | 2 264 ₽ | ||
| ADS8413IBRGZT Texas Instruments | 3 526 ₽ | ||
| ADS8413IBRGZT Texas Instruments | от 7 721 ₽ | ||
Статус
| Статус продукта | В производстве (Рекомендуется для новых разработок) |
| Доступность образцов у производителя | Нет |
Корпус / Упаковка / Маркировка
| Pin | 48 | 48 |
| Package Type | RGZ | RGZ |
| Industry STD Term | VQFN | VQFN |
| JEDEC Code | S-PQFP-N | S-PQFP-N |
| Package QTY | 250 | 250 |
| Carrier | SMALL T&R | SMALL T&R |
| Маркировка | ADS8413I | B |
| Width (мм) | 7 | 7 |
| Length (мм) | 7 | 7 |
| Thickness (мм) | .9 | .9 |
| Pitch (мм) | .5 | .5 |
| Max Height (мм) | 1 | 1 |
| Mechanical Data | Скачать | Скачать |
Параметры
| # Input Channels | 1 |
| Analog Voltage AVDD(Max) | 5.25 В |
| Analog Voltage AVDD(Min) | 4.75 В |
| Архитектура | SAR |
| Digital Supply(Max) | 5.25 В |
| Digital Supply(Min) | 2.7 В |
| INL(Max) | 2 +/-LSB |
| Input Range(Max) | 4.2 В |
| Input Range(Min) | 4.2 В |
| Тип входа | Differential |
| Integrated Features | Daisy-Chainable,Oscillator |
| Interface | Parallel |
| Multi-Channel Configuration | N/A |
| Рабочий диапазон температур | от -40 до 85 C |
| Package Group | VQFN |
| Package Size: mm2:W x L | 48VQFN: 49 mm2: 7 x 7(VQFN) PKG |
| Power Consumption(Typ) | 290 mW |
| Rating | Catalog |
| Reference Mode | Ext,Int |
| Разрешение | 16 Bits |
| SINAD | 92 дБ |
| SNR | 92 дБ |
| Sample Rate (max) | 2MSPS SPS |
| Sample Rate(Max) | 2 MSPS |
| THD(Typ) | -107 дБ |
Экологический статус
| RoHS | Совместим |
Application Notes
- Connecting ADS8410/13 With Long CablePDF, 773 Кб, Файл опубликован: 2 дек 2005
Many applications require that the analog-to-digital converter (ADC) be located near the field sensor; however, the digital processing often occurs at a distance. Therefore, the input and output signals need to travel through a long cable from the field sensor to the site where digital processing occurs. This application report is a guide for using a 1-meter cable, the Samtec EQCD Series high data - Using ADS8410/13 in Daisy Chain ModePDF, 3.2 Мб, Файл опубликован: 22 май 2006
Many applications require multiple analog-to-digital converters (ADC) in a system. Daisy chaining multiple ADCs enables the use of a single data receiver or a small FPGA. It offers easy and minimal digital routing. This application report describes how multiple ADCs (ADS8410/13) work in a daisy-chain mode. The device offers a high-speed (200 Mbps) LVDS serial interface. This application report als - Using ADS8410/13 in Cascade ModePDF, 2.9 Мб, Файл опубликован: 8 июн 2006
Many applications require multiple analog-to-digital converters (ADC) in a system. Cascading multiple ADCs enables the use of a single data receiver or a small FPGA. This offers lower power consumption and independent ADC usage. This application report describes how multiple ADCs (ADS8410/13) work in a cascade mode. The ADS8410/13 integrated circuit offers a high-speed (200 Mbps) LVDS serial inter - Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)PDF, 227 Кб, Версия: A, Файл опубликован: 10 ноя 2010
This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different - Determining Minimum Acquisition Times for SAR ADCs, part 2PDF, 215 Кб, Файл опубликован: 17 мар 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
Модельный ряд
Серия: ADS8413 (7)
Классификация производителя
- Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)
