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Datasheet Texas Instruments THS1030IPW — Даташит

ПроизводительTexas Instruments
СерияTHS1030
МодельTHS1030IPW
Datasheet Texas Instruments THS1030IPW

10-разрядный аналого-цифровой преобразователь (АЦП) с быстродействием 30 MSPS 28-TSSOP от -40 до 85

Datasheets

3-V to 5.5-V 10-Bit, 30 MSPS CMOS Analog-to-Digital Converter datasheet
PDF, 1.0 Мб, Версия: E, Файл опубликован: 30 окт 2003
Выписка из документа

Цены

12 предложений от 9 поставщиков
10Bit, 30MSPS Analog-to-Digital Converter (ADC) 28-TSSOP -40℃ to 85℃
Akcel
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THS1030IPW
Texas Instruments
от 111 ₽
EIS Components
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THS1030IPW
Texas Instruments
447 ₽
AiPCBA
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THS1030IPW
Texas Instruments
1 651 ₽
ChipWorker
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THS1030IPW
Texas Instruments
1 686 ₽
Выбираем схему BMS для заряда литий-железофосфатных (LiFePO4) аккумуляторов

Статус

Статус продуктаВ производстве (Рекомендуется для новых разработок)
Доступность образцов у производителяНет

Корпус / Упаковка / Маркировка

Pin28
Package TypePW
Industry STD TermTSSOP
JEDEC CodeR-PDSO-G
Package QTY50
CarrierTUBE
МаркировкаTJ1030
Width (мм)4.4
Length (мм)9.7
Thickness (мм)1
Pitch (мм).65
Max Height (мм)1.2
Mechanical DataСкачать

Параметры

# Input Channels1
Analog Input BW150 МГц
АрхитектураPipeline
DNL(Max)1 +/-LSB
DNL(Typ)0.3 +/-LSB
ENOB9 Bits
INL(Max)2 +/-LSB
INL(Typ)1 +/-LSB
Input BufferNo
Input Range2 Vp-p
InterfaceParallel CMOS
Рабочий диапазон температурот -40 до 85,0 до 70 C
Package GroupTSSOP
Package Size: mm2:W x L28TSSOP: 62 mm2: 6.4 x 9.7(TSSOP) PKG
Power Consumption(Typ)150 mW
RatingCatalog
Reference ModeExt,Int
Разрешение10 Bits
SFDR53 дБ
SINAD48.6 дБ
SNR49.4 дБ
Sample Rate(Max)30 MSPS

Экологический статус

RoHSСовместим

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Application Notes

  • CDCE62005 as Clock Solution for High-Speed ADCs
    PDF, 805 Кб, Файл опубликован: 4 сен 2008
    TI has introduced a family of devices well-suited to meet the demands for high-speed ADC devices such as the ADS5527 which is capable of sampling up to 210 MSPS. To realize the full potential of these high-performance products it is imperative to provide a low phase noise clock source. The CDCE62005 clock synthesizer chip offers a real-world clocking solution to meet these stringent requirements
  • Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio
    PDF, 376 Кб, Файл опубликован: 28 апр 2009
    This application report explains different aspects of selecting analog-to-digital and digital-to-analog data converters for Software-Defined Radio (SDR) applications. It also explains how ADS61xx ADCs and the DAC5688 from Texas Instruments fit properly for SDR designs.
  • Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A)
    PDF, 327 Кб, Версия: A, Файл опубликован: 10 сен 2010
    This application report discusses the performance-related aspects of passive and active interfaces at the analog input of high-speed pipeline analog-to-digital converters (ADCs). The report simplifies the many possibilities into two main categories: passive and active interface circuits. The first section of the report gives an overview of equivalent models of buffered and unbuffered ADC input cir
  • Phase Noise Performance and Jitter Cleaning Ability of CDCE72010
    PDF, 2.3 Мб, Файл опубликован: 2 июн 2008
    This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the reference clock VCXO clock and the CDCE72010 itself. This application report shows the phase noise performance at several of the most popular CDMA frequencies. This data helps the user to choose the rig
  • CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters
    PDF, 424 Кб, Файл опубликован: 8 июн 2008
    Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483 which is capable of sampling up to 135 MSPS. To realize the full potential of these high-performance devices the system must provide an extremely low phase noise clock source. The CDCE72010 clock synthesizer chip offers
  • Noise Analysis for High Speed Op Amps (Rev. A)
    PDF, 256 Кб, Версия: A, Файл опубликован: 17 янв 2005
    As system bandwidths have increased an accurate estimate of the noise contribution for each element in the signal channel has become increasingly important. Many designers are not however particularly comfortable with the calculations required to predict the total noise for an op amp or in the conversions between the different descriptions of noise. Considerable inconsistency between manufactu

Модельный ряд

Классификация производителя

  • Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > High Speed ADCs (>10MSPS)

На английском языке: Datasheet Texas Instruments THS1030IPW

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