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Datasheet Texas Instruments 74LVTH16245ADGGRE4 — Даташит

ПроизводительTexas Instruments
СерияSN74LVTH16245A
Модель74LVTH16245ADGGRE4
Datasheet Texas Instruments 74LVTH16245ADGGRE4

16-битные шинные трансиверы ABT 3,3 В с выходами с 3 состояниями 48-TSSOP от -40 до 85

Datasheets

3.3-V ABT 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS--SN74LVTH16245A datasheet
PDF, 969 Кб, Версия: R, Файл опубликован: 1 ноя 2006
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3.3V ABT 16Bit Bus Transceivers With 3-State Outputs 48-TSSOP -40℃ to 85℃
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Статус

Статус продуктаВ производстве (Рекомендуется для новых разработок)
Доступность образцов у производителяНет

Корпус / Упаковка / Маркировка

Pin48
Package TypeDGG
Industry STD TermTSSOP
JEDEC CodeR-PDSO-G
Package QTY2000
CarrierLARGE T&R
МаркировкаLVTH16245A
Width (мм)6.1
Length (мм)12.5
Thickness (мм)1.15
Pitch (мм).5
Max Height (мм)1.2
Mechanical DataСкачать

Параметры

Bits16
F @ Nom Voltage(Max)160 Mhz
ICC @ Nom Voltage(Max)5 мА
Рабочий диапазон температурот -40 до 85 C
Output Drive (IOL/IOH)(Max)-32/64 мА
Package GroupTSSOP
Package Size: mm2:W x L48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP) PKG
RatingCatalog
Schmitt TriggerNo
Technology FamilyLVT
VCC(Max)3.6 В
VCC(Min)2.7 В
Voltage(Nom)3.3 В
tpd @ Nom Voltage(Max)3.3 нс

Экологический статус

RoHSСовместим

Application Notes

  • LVT Family Characteristics (Rev. A)
    PDF, 98 Кб, Версия: A, Файл опубликован: 1 мар 1998
    To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti
  • LVT-to-LVTH Conversion
    PDF, 84 Кб, Файл опубликован: 8 дек 1998
    Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed.
  • Bus-Hold Circuit
    PDF, 418 Кб, Файл опубликован: 5 фев 2001
    When designing systems that include CMOS devices, designers must pay special attention to the operating condition in which all of the bus drivers are in an inactive, high-impedance condition (3-state). Unless special measures are taken, this condition can lead to undefined levels and, thus, to a significant increase in the device?s power dissipation. In extreme cases, this leads to oscillation of
  • 16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)
    PDF, 895 Кб, Версия: B, Файл опубликован: 22 май 2002
    TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa
  • Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)
    PDF, 105 Кб, Версия: A, Файл опубликован: 1 авг 1997
    The spectrum of bus-interface devices with damping resistors or balanced/light output drive currently offered by various logic vendors is confusing at best. Inconsistencies in naming conventions and methods used for implementation make it difficult to identify the best solution for a given application. This report attempts to clarify the issue by looking at several vendors? approaches and discussi
  • Understanding Advanced Bus-Interface Products Design Guide
    PDF, 253 Кб, Файл опубликован: 1 май 1996
  • Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices
    PDF, 209 Кб, Файл опубликован: 10 май 2002
    Many telecom and networking applications require that cards be inserted and extracted from a live backplane without interrupting data or damaging components. To achieve this interface terminals of the card must be electrically isolated from the bus system during insertion or extraction from the backplane. To facilitate this Texas Instruments provides bus-interface and logic devices with features
  • Implications of Slow or Floating CMOS Inputs (Rev. D)
    PDF, 260 Кб, Версия: D, Файл опубликован: 23 июн 2016
  • Live Insertion
    PDF, 150 Кб, Файл опубликован: 1 окт 1996
    Many applications require the ability to exchange modules in electronic systems without removing the supply voltage from the module (live insertion). For example an electronic telephone exchange must always remain operational even during module maintenance and repair. To avoid damaging components additional circuitry modifications are necessary. This document describes in detail the phenomena tha
  • Input and Output Characteristics of Digital Integrated Circuits
    PDF, 1.7 Мб, Файл опубликован: 1 окт 1996
    This report contains a comprehensive collection of the input and output characteristic curves of typical integrated circuits from various logic families. These curves go beyond the information given in data sheets by providing additional details regarding the characteristics of the components. This knowledge is particularly useful when for example a decision must be made as to which circuit shou

Модельный ряд

Классификация производителя

  • Semiconductors > Logic > Buffer/Driver/Transceiver > Standard Transceiver

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