Datasheet ТI SN64BCT244NSR — Даташит

 
 


  
SCBS027A -FEBRUARY 1989 -REVISED JANUARY 1994 DW OR N PACKAGE
(TOP VIEW) State-of-the-Art BiCMOS Design
Significantly Reduces ICCZ
3-State Outputs Drive Bus Lines or
Buffer-Memory Address Registers
P-N-P Inputs Reduce DC Loading
High-Impedance State During Power Up
and Power Down
Package Options Include Plastic
Small-Outline (DW) Packages and Standard
Plastic 300-mil DIPs (N) 1OE
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
GND description 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC …