Datasheet Texas Instruments SN74LVTH244AGQNR — Даташит

Datasheets

PDF, 1.5 Мб, Версия: J, Файл опубликован: 8 окт 2003

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Купить SN74LVTH244AGQNR на РадиоЛоцман.Цены — от 58 до 268 ₽ 17 предложений от 10 поставщиков Микросхема: IC BUFFER NON-INVERT 3.6V 20BGA
T-electron Россия и страны СНГ	SN74LVTH244AGQNR Texas Instruments	58 ₽
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ТаймЧипс Россия	SN74LVTH244AGQNR Texas Instruments	по запросу

Статус продукта	Снят с производства (Производитель прекратил производство прибора)
Доступность образцов у производителя	Нет

Approx. Price (US$)	0.24 \| 1ku
Bits(#)	8
F @ Nom Voltage(Max)(Mhz)	160
ICC @ Nom Voltage(Max)(mA)	0.005
Тип входа	TTL
Operating Temperature Range(C)	-40 to 85
Output Drive (IOL/IOH)(Max)(mA)	-32/64
Тип выхода	LVTTL
Package Group	BGA MICROSTAR JUNIOR SO SOIC SSOP TSSOP VQFN
Package Size: mm2:W x L (PKG)	20BGA MICROSTAR JUNIOR: 12 mm2: 3 x 4(BGA MICROSTAR JUNIOR) 20VQFN: 16 mm2: 3.5 x 4.5(VQFN) 20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP) 20SSOP: 56 mm2: 7.8 x 7.2(SSOP) 20SO: 98 mm2: 7.8 x 12.6(SO) 20SOIC: 132 mm2: 10.3 x 12.8(SOIC)
Rating	Catalog
Schmitt Trigger	No
Technology Family	LVT
VCC(Max)(V)	3.6
VCC(Min)(V)	2.7
Voltage(Nom)(V)	3.3
tpd @ Nom Voltage(Max)(ns)	3.5

RoHS	Не совместим
Бессвинцовая технология (Pb Free)	Нет

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LVT Family Characteristics (Rev. A)
PDF, 98 Кб, Версия: A, Файл опубликован: 1 мар 1998
To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti
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LVT-to-LVTH Conversion
PDF, 84 Кб, Файл опубликован: 8 дек 1998
Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed.
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Bus-Hold Circuit
PDF, 418 Кб, Файл опубликован: 5 фев 2001
When designing systems that include CMOS devices, designers must pay special attention to the operating condition in which all of the bus drivers are in an inactive, high-impedance condition (3-state). Unless special measures are taken, this condition can lead to undefined levels and, thus, to a significant increase in the device?s power dissipation. In extreme cases, this leads to oscillation of