Datasheet Texas Instruments ADS774KU/1K — Даташит
| Производитель | Texas Instruments |
| Серия | ADS774 |
| Модель | ADS774KU/1K |
Совместимый с микропроцессором КМОП аналого-цифровой преобразователь 28-SOIC от -40 до 85
Datasheets
Microprocessor-Compatible Sampling CMOS A/D Converter datasheet
PDF, 935 Кб, Файл опубликован: 27 сен 2000
Выписка из документа
Цены
 Купить ADS774KU/1K на РадиоЛоцман.Цены — от 2 040 до 193 548 ₽10 предложений от 10 поставщиков Analog to Digital Converter Microprocessor-Compatible Sampling CMOS A/D Converter Single ADC SAR 125KSPS 12Bit Parallel 28Pin SOIC T/R | |||
| ADS774KU/1K Texas Instruments | 2 040 ₽ | ||
| ADS774KU/1K Texas Instruments | 2 828 ₽ | ||
| ADS774KU/1K Texas Instruments | 2 977 ₽ | ||
| ADS774KU/1K Texas Instruments | 3 042 ₽ | ||
Статус
| Статус продукта | В производстве (Рекомендуется для новых разработок) |
| Доступность образцов у производителя | Нет |
Корпус / Упаковка / Маркировка
| Pin | 28 |
| Package Type | DW |
| Industry STD Term | SOIC |
| JEDEC Code | R-PDSO-G |
| Package QTY | 1000 |
| Carrier | LARGE T&R |
| Маркировка | ADS774KU |
| Width (мм) | 7.5 |
| Length (мм) | 17.9 |
| Thickness (мм) | 2.35 |
| Pitch (мм) | 1.27 |
| Max Height (мм) | 2.65 |
| Mechanical Data | Скачать |
Параметры
| # Input Channels | 1 |
| Analog Voltage AVDD(Max) | 5.5 В |
| Analog Voltage AVDD(Min) | 4.5 В |
| Архитектура | SAR |
| Digital Supply(Max) | 5.5 В |
| Digital Supply(Min) | 4.5 В |
| INL(Max) | 0.5 +/-LSB |
| Input Range(Max) | 10 В |
| Input Range(Min) | -10 В |
| Тип входа | Single-Ended |
| Integrated Features | N/A |
| Interface | Parallel |
| Multi-Channel Configuration | N/A |
| Рабочий диапазон температур | от -40 до 85 C |
| Package Group | SOIC |
| Package Size: mm2:W x L | 28SOIC: 184 mm2: 10.3 x 17.9(SOIC) PKG |
| Power Consumption(Typ) | 75 mW |
| Rating | Catalog |
| Reference Mode | Ext,Int |
| Разрешение | 12 Bits |
| SINAD | N/A дБ |
| SNR | 72 дБ |
| Sample Rate (max) | 117kSPS SPS |
| Sample Rate(Max) | 0.117 MSPS |
| THD(Typ) | -77 дБ |
Экологический статус
| RoHS | Совместим |
Application Notes
- Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)PDF, 69 Кб, Версия: A, Файл опубликован: 18 май 2015
- CDAC Architecture Gives ADC574 Pinout /Sampling, Low Power, New Input RangesPDF, 54 Кб, Файл опубликован: 27 сен 2000
This application note compares basic current-mode successive approximation A/Ds with CDAC-based architectures, and shows how adding a resistor divider network to the CDAC input permits the Burr-Brown ADS574 and ADS774 to fit existing ADC574 sockets. It then goes on to descibe some new analog input voltage ranges available on these parts due to the resistor network and CDAC approach. - A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)PDF, 425 Кб, Версия: B, Файл опубликован: 9 окт 2011
This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference. - Complete Temp Data Acquisition System From a Single +5V SupplyPDF, 68 Кб, Файл опубликован: 2 окт 2000
The CMOS ADS574 and ADS774 are drop-in replacements for industry standard ADC574 analog-to-digital converter, offering lower power and the capability to operate from a single +5V supply. The switched capacitor array architecture (CDAC), with the input resistor divider network to provide ADC574 input ranges, also allow the new parts to handle additional input ranges, including a 0V to 5V range. Thi - Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)PDF, 227 Кб, Версия: A, Файл опубликован: 10 ноя 2010
This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different - Principles of Data Acquisition and Conversion (Rev. A)PDF, 132 Кб, Версия: A, Файл опубликован: 16 апр 2015
- Determining Minimum Acquisition Times for SAR ADCs, part 2PDF, 215 Кб, Файл опубликован: 17 мар 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
Модельный ряд
Серия: ADS774 (9)
Классификация производителя
- Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)
