Datasheet Texas Instruments TMS320C6657GZHA — Даташит
| Производитель | Texas Instruments |
| Серия | TMS320C6657 |
| Модель | TMS320C6657GZHA |
Процессор цифровых сигналов с фиксированной и плавающей запятой 625-FCBGA от -40 до 100
Datasheets
TMS320C6655 and TMS320C6657 Fixed and Floating-Point Digital Signal Processor datasheet
PDF, 1.8 Мб, Версия: C, Файл опубликован: 19 май 2016
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Цены
 Купить TMS320C6657GZHA на РадиоЛоцман.Цены — от 7 549 до 34 482 ₽16 предложений от 11 поставщиков Процессоры и контроллеры цифровых сигналов (DSP, DSC) Fixed/Float Pt DSP | |||
| TMS320C6657GZHA Texas Instruments | 7 549 ₽ | ||
| TMS320C6657GZHA Texas Instruments | 8 198 ₽ | ||
| TMS320C6657GZHA Texas Instruments | по запросу | ||
| TMS320C6657GZHA Texas Instruments | по запросу | ||
Статус
| Статус продукта | В производстве (Рекомендуется для новых разработок) |
| Доступность образцов у производителя | Да |
Корпус / Упаковка / Маркировка
| Pin | 625 | 625 | 625 |
| Package Type | GZH | GZH | GZH |
| Package QTY | 60 | 60 | 60 |
| Carrier | JEDEC TRAY (5+1) | JEDEC TRAY (5+1) | JEDEC TRAY (5+1) |
| Маркировка | @2012 TI | A1GHZ | TMS320C6657GZH |
| Width (мм) | 21 | 21 | 21 |
| Length (мм) | 21 | 21 | 21 |
| Thickness (мм) | 2.42 | 2.42 | 2.42 |
| Mechanical Data | Скачать | Скачать | Скачать |
Параметры
| Applications | Avionics & Defense,Communications,Machine Vision |
| DRAM | DDR3 |
| DSP | 2 C66x |
| DSP MHz | 1000,1250 Max. |
| EMAC | 10/100/1000 |
| GFLOPS | 32,40 |
| Hardware Accelerators | VCP2,TCP3d |
| On-Chip L2 Cache | 2048 KB |
| Рабочий диапазон температур | от -40 до 100,0 до 85 C |
| Other On-Chip Memory | 1024 KB |
| PCI/PCIe | 2 PCIe Gen2 |
| Package Size: mm2:W x L | See datasheet (FCBGA) PKG |
| Rating | Catalog |
| Serial I/O | Hyperlink,I2C,RapidIO,SPI,TSIP,UART |
| Serial RapidIO | 1 (four lanes) |
| Total On-Chip Memory | 3200 KB |
Экологический статус
| RoHS | See ti.com |
Комплекты разработчика и оценочные наборы
- Evaluation Modules & Boards: TMDSEVM6657
TMS320C6657 Lite Evaluation Modules
Статус продукта: В производстве (Рекомендуется для новых разработок) - JTAG Emulators/ Analyzers: TMDSEMU200-U
XDS200 USB Debug Probe
Статус продукта: В производстве (Рекомендуется для новых разработок) - JTAG Emulators/ Analyzers: TMDSEMU560V2STM-UE
XDS560v2 System Trace USB & Ethernet Debug Probe
Статус продукта: В производстве (Рекомендуется для новых разработок) - JTAG Emulators/ Analyzers: TMDSEMU560V2STM-U
XDS560v2 System Trace USB Debug Probe
Статус продукта: В производстве (Рекомендуется для новых разработок)
Application Notes
- PCI Express (PCIe) Resource Wiki for Keystone Devices (Rev. A)PDF, 57 Кб, Версия: A, Файл опубликован: 19 май 2017
- Keystone NDK FAQPDF, 54 Кб, Файл опубликован: 3 окт 2016
This document is a collection of frequently asked questions (FAQ) on running the NDK examples on the KeyStoneв„ў family of devices. - TI Keystone DSP Hyperlink SerDes IBIS-AMI ModelsPDF, 3.2 Мб, Файл опубликован: 9 окт 2014
This document describes the organization, structure, and proper usage of the TI serializer and deserializer (SerDes) IBIS-AMI models for Keystone DSP Hyperlink interface. - TI Keystone DSP PCIe SerDes IBIS-AMI ModelsPDF, 4.8 Мб, Файл опубликован: 9 окт 2014
This document describes the organization, structure, and proper usage of the TI serializer and deserializer (SerDes) IBIS-AMI models for Keystone DSP PCIe interface. - SerDes Implementation Guidelines for KeyStone I DevicesPDF, 590 Кб, Файл опубликован: 31 окт 2012
The goal of KeyStone I SerDes collateral material is to make system implementation easier for the customer by providing the system solution. For these SerDes-based interfaces, it is not assumed that the system designer is familiar with the industry specifications, SerDes technology, or RF/microwave PCB design. However, it is still expected that the PCB design work will be supervised by a knowledge - Hardware Design Guide for KeyStone Devices (Rev. C)PDF, 1.7 Мб, Версия: C, Файл опубликован: 15 сен 2013
- KeyStone I DDR3 Initialization (Rev. E)PDF, 114 Кб, Версия: E, Файл опубликован: 28 окт 2016
The initialization of the DDR3 DRAM controller on KeyStone I DSPs is straightforward as long as the proper steps are followed. However, if some steps are omitted or if some sequence-sensitive steps are implemented in the wrong order, DDR3 operation will be unpredictable.All DDR3 initialization routines must contain the basic register writes to configure the memory controller within the DSP - TMS320C66x DSP Generation of Devices (Rev. A)PDF, 245 Кб, Версия: A, Файл опубликован: 25 апр 2011
- AN-1281 Bumped Die (Flip Chip) Packages (Rev. A)PDF, 2.2 Мб, Версия: A, Файл опубликован: 1 май 2004
Application Note 1281 Bumped Die (Flip Chip) Packages - SERDES Link Commissioning on KeyStone I and II DevicesPDF, 138 Кб, Файл опубликован: 13 апр 2016
The serializer-deserializer (SerDes) performs serial-to-parallel conversions on data received from a peripheral device and parallel-to-serial conversion on data received from the CPU. This application report explains the SerDes transmit and receive parameters tuning, tools and some debug techniques for TI Keystone I and Keystone II devices. - PCIe Use Cases for KeyStone DevicesPDF, 320 Кб, Файл опубликован: 13 дек 2011
- Clocking Design Guide for KeyStone DevicesPDF, 1.5 Мб, Файл опубликован: 9 ноя 2010
- Optimizing Loops on the C66x DSPPDF, 585 Кб, Файл опубликован: 9 ноя 2010
- The C6000 Embedded Application Binary Interface Migration Guide (Rev. A)PDF, 20 Кб, Версия: A, Файл опубликован: 10 ноя 2010
The C6000 compiler tools support a new ELF-based ABI named EABI. Prior to this time, the compiler only supported a single ABI, which is now named COFF ABI. The following compelling best-in-class features are available under the C6000 EABI:GeneralZero-init globals: “int gvar;” gets set to 0 before main runs.Dynamic linking: Add code to a running system.Native ROM - DDR3 Design Requirements for KeyStone Devices (Rev. B)PDF, 582 Кб, Версия: B, Файл опубликован: 5 июн 2014
- Multicore Programming Guide (Rev. B)PDF, 1.8 Мб, Версия: B, Файл опубликован: 29 авг 2012
As application complexity continues to grow, we have reached a limit on increasing performance by merely scaling clock speed. To meet the ever-increasing processing demand, modern System-On-Chip solutions contain multiple processing cores. The dilemma is how to map applications to multicore devices. In this paper, we present a programming methodology for converting applications to run on multicore - Processor SDK RTOS Audio Benchmark Starter KitPDF, 530 Кб, Файл опубликован: 12 апр 2017
The TI TMS320C6000в„ў Digital Signal Processors (DSPs) have many architectural advantages that make them ideal for computation-intensive real-time applications that are commonly used in audio processing application. This application notes describes Audio Benchmark Starterkit software that is intended to provide an easy and quick way to benchmark key audio functions on C66x and C674x DSP device - TI DSP BenchmarkingPDF, 62 Кб, Файл опубликован: 13 янв 2016
This application report provides benchmarks for the C674x DSP core, the C66x DSP core and the ARMВ®CortexВ®-A15 core. This document also shows how to reproduce these benchmarks on specific hardware platforms. - Plastic Ball Grid Array [PBGA] Application Note (Rev. B)PDF, 1.6 Мб, Версия: B, Файл опубликован: 13 авг 2015
Модельный ряд
Серия: TMS320C6657 (7)
Классификация производителя
- Semiconductors > Processors > Digital Signal Processors > C6000 DSP > C66x DSP
