Datasheet Texas Instruments SN74LVTH240PWR — Даташит
Производитель | Texas Instruments |
Серия | SN74LVTH240 |
Модель | SN74LVTH240PWR |
Восьмеричные буферы/драйверы ABT 3,3 В с выходами с 3 состояниями 20-TSSOP от -40 до 85
Datasheets
SN54LVTH240, SN74LVTH240 datasheet
PDF, 1.3 Мб, Версия: K, Файл опубликован: 11 сен 2003
Выписка из документа
Цены
Купить SN74LVTH240PWR на РадиоЛоцман.Цены — от 32 до 268 ₽ 30 предложений от 16 поставщиков Интегральные микросхемы Логические микросхемы - Буферы, Приемники, Приемопередатчики | |||
SN74LVTH240PWR Texas Instruments | 32 ₽ | ||
SN74LVTH240PWR Texas Instruments | 37 ₽ | ||
SN74LVTH240PWR Texas Instruments | 42 ₽ | ||
SN74LVTH240PWR Texas Instruments | по запросу |
Статус
Статус продукта | В производстве (Рекомендуется для новых разработок) |
Доступность образцов у производителя | Нет |
Корпус / Упаковка / Маркировка
Pin | 20 |
Package Type | PW |
Industry STD Term | TSSOP |
JEDEC Code | R-PDSO-G |
Package QTY | 2000 |
Carrier | LARGE T&R |
Маркировка | LXH240 |
Width (мм) | 4.4 |
Length (мм) | 6.5 |
Thickness (мм) | 1 |
Pitch (мм) | .65 |
Max Height (мм) | 1.2 |
Mechanical Data | Скачать |
Параметры
Bits | 8 |
F @ Nom Voltage(Max) | 160 Mhz |
ICC @ Nom Voltage(Max) | 0.005 мА |
Рабочий диапазон температур | от -40 до 85 C |
Output Drive (IOL/IOH)(Max) | -32/64 мА |
Package Group | TSSOP |
Package Size: mm2:W x L | 20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP) PKG |
Rating | Catalog |
Schmitt Trigger | No |
Technology Family | LVT |
VCC(Max) | 3.6 В |
VCC(Min) | 2.7 В |
Voltage(Nom) | 3.3 В |
tpd @ Nom Voltage(Max) | 4.6 нс |
Экологический статус
RoHS | Совместим |
Application Notes
- LVT Family Characteristics (Rev. A)PDF, 98 Кб, Версия: A, Файл опубликован: 1 мар 1998
To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti - LVT-to-LVTH ConversionPDF, 84 Кб, Файл опубликован: 8 дек 1998
Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed. - Bus-Hold CircuitPDF, 418 Кб, Файл опубликован: 5 фев 2001
When designing systems that include CMOS devices, designers must pay special attention to the operating condition in which all of the bus drivers are in an inactive, high-impedance condition (3-state). Unless special measures are taken, this condition can lead to undefined levels and, thus, to a significant increase in the device?s power dissipation. In extreme cases, this leads to oscillation of
Модельный ряд
Серия: SN74LVTH240 (12)
Классификация производителя
- Semiconductors > Logic > Buffer/Driver/Transceiver > Inverting Buffer/Driver