Datasheet Texas Instruments SN74LVTH574PWRG4 — Даташит

Восьмеричные триггеры D-типа ABT, 3,3 В, с триггером по фронту и выходами с 3 состояниями 20-TSSOP от -40 до 85

Datasheets

PDF, 1.4 Мб, Версия: G, Файл опубликован: 15 сен 2003

Выписка из документа

Купить SN74LVTH574PWRG4 на РадиоЛоцман.Цены — от 17 до 774 ₽ 14 предложений от 13 поставщиков Микросхема Бистабильный мультивибратор, 3.3V ABT Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputs 20-TSSOP -40℃ to 85℃
ChipWorker Весь мир	SN74LVTH574PWRG4 Texas Instruments	17 ₽
ЧипСити Россия	SN74LVTH574PWRG4 Texas Instruments	33 ₽
Augswan Весь мир	SN74LVTH574PWRG4 Texas Instruments	по запросу
Океан Электроники Россия	SN74LVTH574PWRG4 Texas Instruments	по запросу

Статус продукта	В производстве (Рекомендуется для новых разработок)
Доступность образцов у производителя	Нет

3-State Output	Yes
Bits	8
F @ Nom Voltage(Max)	160 Mhz
ICC @ Nom Voltage(Max)	5 мА
Рабочий диапазон температур	от -40 до 85 C
Output Drive (IOL/IOH)(Max)	64/-32 мА
Package Group	TSSOP
Package Size: mm2:W x L	20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP) PKG
Rating	Catalog
Schmitt Trigger	No
Technology Family	LVT
VCC(Max)	3.6 В
VCC(Min)	2.7 В
Voltage(Nom)	3.3 В
tpd @ Nom Voltage(Max)	4.5 нс

RoHS

Совместим

Скачать
LVT Family Characteristics (Rev. A)
PDF, 98 Кб, Версия: A, Файл опубликован: 1 мар 1998
To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti
Скачать
LVT-to-LVTH Conversion
PDF, 84 Кб, Файл опубликован: 8 дек 1998
Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed.
Скачать
Bus-Hold Circuit
PDF, 418 Кб, Файл опубликован: 5 фев 2001
When designing systems that include CMOS devices, designers must pay special attention to the operating condition in which all of the bus drivers are in an inactive, high-impedance condition (3-state). Unless special measures are taken, this condition can lead to undefined levels and, thus, to a significant increase in the device?s power dissipation. In extreme cases, this leads to oscillation of

Серия: SN74LVTH574 (13)