Datasheet ТI TPS51463RGER — Даташит

TPS51463
www.ti.com SLUSAX2 – FEBRUARY 2012 3.3-V/5-V Input, D-CAP+™ Mode Synchronous Step-Down Integrated FETs Converter
With 2-Bit VID
Check for Samples: TPS51463 FEATURES DESCRIPTION The TPS51463 is a fully integrated synchronous buck
regulator employing D-CAP+в„ў. It is used for up to 5V step-down where system size is at its premium,
performance and optimized BOM are must-haves. 1 23 Integrated FETs Converter w/TI Proprietary
D-CAP+в„ў Mode Architecture
Minimum External Parts Count
Support all MLCC Output Capacitor and
SP/POSCAP
Auto Skip Mode
Selectable 700-kHz and 1-MHz Frequency
Small 4 mm Г— 4 mm, 24-Pin, QFN Package The TPS51463 fully supports the IntelВ® Chief River
platform, a ULV/CPU system agent application with
integrated 2-bit VID function.
The TPS51463 also features two switching frequency
settings (700 kHz and 1 MHz), skip mode, pre-bias
startup, programmable external capacitor soft-start
time/voltage transition time, output discharge, internal
VBST Switch, 2-V reference (В±1%), power good and
enable. APPLICATIONS Low-Voltage Applications Stepping Down from
5-V or 3.3-V Rail
Notebook/Desktop Computers …