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Datasheet Texas Instruments 74AC11086 — Даташит

ПроизводительTexas Instruments
Серия74AC11086
Datasheet Texas Instruments 74AC11086

Четверные вентили «исключающее ИЛИ» с 2 входами

Datasheets

Quadruple 2-Input Exclusive-OR Gate datasheet
PDF, 251 Кб, Версия: A, Файл опубликован: 1 апр 1996
Выписка из документа

Цены

30 предложений от 20 поставщиков
TEXAS INSTRUMENTS 74AC11086D XOR Gate, AC Family, 4 Gate, 2 Input, 24 mA, 3V to 5.5V, SOIC-16
EIS Components
Весь мир
74AC11086N
Texas Instruments
74 ₽
Akcel
Весь мир
74AC11086DR
Texas Instruments
от 74 ₽
Элитан
Россия
74AC11086D
Texas Instruments
242 ₽
FAV Technology
Весь мир
74AC11086DRE4
Texas Instruments
по запросу
Выбираем схему BMS для заряда литий-железофосфатных (LiFePO4) аккумуляторов

Статус

74AC11086D74AC11086DR74AC11086DRE474AC11086DRG474AC11086N
Статус продуктаВ производствеСнят с производстваСнят с производстваСнят с производстваВ производстве
Доступность образцов у производителяНетНетНетНетНет

Корпус / Упаковка / Маркировка

74AC11086D74AC11086DR74AC11086DRE474AC11086DRG474AC11086N
N12345
Pin1616161616
Package TypeDDDDN
Industry STD TermSOICSOICSOICSOICPDIP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDIP-T
Package QTY4025
CarrierTUBETUBE
МаркировкаAC1108674AC11086N
Width (мм)3.913.913.913.916.35
Length (мм)9.99.99.99.919.3
Thickness (мм)1.581.581.581.583.9
Pitch (мм)1.271.271.271.272.54
Max Height (мм)1.751.751.751.755.08
Mechanical DataСкачатьСкачатьСкачатьСкачатьСкачать

Параметры

Parameters / Models74AC11086D
74AC11086D
74AC11086DR
74AC11086DR
74AC11086DRE4
74AC11086DRE4
74AC11086DRG4
74AC11086DRG4
74AC11086N
74AC11086N
Approx. Price (US$)0.94 | 1ku0.94 | 1ku0.94 | 1ku
Bits44
Bits(#)444
F @ Nom Voltage(Max), Mhz100100
F @ Nom Voltage(Max)(Mhz)100100100
ICC @ Nom Voltage(Max), мА0.040.04
ICC @ Nom Voltage(Max)(mA)0.040.040.04
Тип входаCMOSCMOSCMOS
Рабочий диапазон температур, Cот -40 до 85от -40 до 85
Operating Temperature Range(C)-40 to 85-40 to 85-40 to 85
Output Drive (IOL/IOH)(Max), мА24/-2424/-24
Output Drive (IOL/IOH)(Max)(mA)24/-2424/-2424/-24
Тип выходаCMOSCMOSCMOS
Package GroupSOICSOICSOICSOICPDIP
Package Size: mm2:W x L, PKG16SOIC: 59 mm2: 6 x 9.9(SOIC)See datasheet (PDIP)
Package Size: mm2:W x L (PKG)See datasheet (PDIP)See datasheet (PDIP)See datasheet (PDIP)
RatingCatalogCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNoNo
Technology FamilyACACACACAC
VCC(Max), В5.55.5
VCC(Max)(V)5.55.55.5
VCC(Min), В33
VCC(Min)(V)333
Voltage(Nom), В3.3,53.3,5
Voltage(Nom)(V)3.3
5
3.3
5
3.3
5
tpd @ Nom Voltage(Max), нс10.6,7.610.6,7.6
tpd @ Nom Voltage(Max)(ns)10.6
7.6
10.6
7.6
10.6
7.6

Экологический статус

74AC11086D74AC11086DR74AC11086DRE474AC11086DRG474AC11086N
RoHSСовместимНе совместимНе совместимНе совместимСовместим
Бессвинцовая технология (Pb Free)НетНетНетДа

Application Notes

  • Live Insertion
    PDF, 150 Кб, Файл опубликован: 1 окт 1996
    Many applications require the ability to exchange modules in electronic systems without removing the supply voltage from the module (live insertion). For example an electronic telephone exchange must always remain operational even during module maintenance and repair. To avoid damaging components additional circuitry modifications are necessary. This document describes in detail the phenomena tha
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    PDF, 93 Кб, Файл опубликован: 30 апр 2015
  • Implications of Slow or Floating CMOS Inputs (Rev. D)
    PDF, 260 Кб, Версия: D, Файл опубликован: 23 июн 2016
  • Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)
    PDF, 614 Кб, Версия: C, Файл опубликован: 2 дек 2015
  • Semiconductor Packing Material Electrostatic Discharge (ESD) Protection
    PDF, 337 Кб, Файл опубликован: 8 июл 2004
    Forty-eight-pin TSSOP components that were packaged using Texas Instruments (TI) standard packing methodology were subjected to electrical discharges between 0.5 and 20 kV as generated by an IEC ESD simulator to determine the level of ISD protection provided by the packing materials. The testing included trays tape and reel and magazines. Additional units were subjected to the same discharge
  • TI IBIS File Creation Validation and Distribution Processes
    PDF, 380 Кб, Файл опубликован: 29 авг 2002
    The Input/Output Buffer Information Specification (IBIS) also known as ANSI/EIA-656 has become widely accepted among electronic design automation (EDA) vendors semiconductor vendors and system designers as the format for digital electrical interface data. Because IBIS models do not reveal proprietary internal processes or architectural information semiconductor vendors? support for IBIS con
  • CMOS Power Consumption and CPD Calculation (Rev. B)
    PDF, 89 Кб, Версия: B, Файл опубликован: 1 июн 1997
    Reduction of power consumption makes a device more reliable. The need for devices that consume a minimum amount of power was a major driving force behind the development of CMOS technologies. As a result CMOS devices are best known for low power consumption. However for minimizing the power requirements of a board or a system simply knowing that CMOS devices may use less power than equivale
  • Input and Output Characteristics of Digital Integrated Circuits
    PDF, 1.7 Мб, Файл опубликован: 1 окт 1996
    This report contains a comprehensive collection of the input and output characteristic curves of typical integrated circuits from various logic families. These curves go beyond the information given in data sheets by providing additional details regarding the characteristics of the components. This knowledge is particularly useful when for example a decision must be made as to which circuit shou
  • Designing With Logic (Rev. C)
    PDF, 186 Кб, Версия: C, Файл опубликован: 1 июн 1997
    Data sheets which usually give information on device behavior only under recommended operating conditions may only partially answer engineering questions that arise during the development of systems using logic devices. However information is frequently needed regarding the behavior of the device outside the conditions in the data sheet. Such questions might be:?How does a bus driver behave w
  • Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc
    PDF, 43 Кб, Файл опубликован: 1 апр 1996
    Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren
  • Shelf-Life Evaluation of Lead-Free Component Finishes
    PDF, 1.3 Мб, Файл опубликован: 24 май 2004
    The integrated circuit (IC) industry is converting to lead (Pb)-free termination finishes for leadframe-based packages. IC component users need to know the maximum length of time that components can be stored prior to being soldered. This study predicts shelf life of the primary Pb-free finishes being proposed by the industry. Components were exposed to a controlled environment, with known aging a

Модельный ряд

Классификация производителя

  • Semiconductors> Logic> Gate> XOR (Exclusive OR) Gate

На английском языке: Datasheet Texas Instruments 74AC11086

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