Datasheet Texas Instruments 74ACT11000 — Даташит

Производитель	Texas Instruments
Серия	74ACT11000

Datasheets

Цены

Купить 74ACT11000 на РадиоЛоцман.Цены — от 50 до 268 ₽ 27 предложений от 20 поставщиков Микросхема: IC GATE NAND 4CH 2-INP 16SOIC
T-electron Россия и страны СНГ	74ACT11000D Texas Instruments	50 ₽	Купить
Стандарт СИЗ Россия	74ACT11000D Texas Instruments	62 ₽	Купить
Кремний Россия и страны СНГ	74ACT11000DG4	по запросу	Купить
Контест Россия	74ACT11000D Texas Instruments	по запросу	Купить

Статус

Корпус / Упаковка / Маркировка

Параметры

Parameters / Models	74ACT11000D	74ACT11000DE4	74ACT11000DG4	74ACT11000DR	74ACT11000DRG4	74ACT11000N	74ACT11000NSR	74ACT11000NSRE4	74ACT11000NSRG4
Approx. Price (US$)							0.88 | 1ku	0.88 | 1ku	0.88 | 1ku
Bits	4	4	4	4	4	4
Bits(#)							4	4	4
F @ Nom Voltage(Max), Mhz	90	90	90	90	90	90
F @ Nom Voltage(Max)(Mhz)							90	90	90
ICC @ Nom Voltage(Max), мА	0.04	0.04	0.04	0.04	0.04	0.04
ICC @ Nom Voltage(Max)(mA)							0.04	0.04	0.04
Тип входа							TTL	TTL	TTL
Рабочий диапазон температур, C	от -40 до 85	от -40 до 85	от -40 до 85	от -40 до 85	от -40 до 85	от -40 до 85
Operating Temperature Range(C)							-40 to 85	-40 to 85	-40 to 85
Output Drive (IOL/IOH)(Max), мА	24/-24	24/-24	24/-24	24/-24	24/-24	24/-24
Output Drive (IOL/IOH)(Max)(mA)							24/-24	24/-24	24/-24
Тип выхода							CMOS	CMOS	CMOS
Package Group	SOIC	SOIC	SOIC	SOIC	SOIC	PDIP	PDIP SOIC	PDIP SOIC	PDIP SOIC
Package Size: mm2:W x L, PKG	16SOIC: 59 mm2: 6 x 9.9(SOIC)	16SOIC: 59 mm2: 6 x 9.9(SOIC)	16SOIC: 59 mm2: 6 x 9.9(SOIC)	16SOIC: 59 mm2: 6 x 9.9(SOIC)	16SOIC: 59 mm2: 6 x 9.9(SOIC)	See datasheet (PDIP)
Package Size: mm2:W x L (PKG)							See datasheet (PDIP)	See datasheet (PDIP)	See datasheet (PDIP)
Rating	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog
Schmitt Trigger	No	No	No	No	No	No	No	No	No
Technology Family	ACT	ACT	ACT	ACT	ACT	ACT	ACT	ACT	ACT
VCC(Max), В	5.5	5.5	5.5	5.5	5.5	5.5
VCC(Max)(V)							5.5	5.5	5.5
VCC(Min), В	4.5	4.5	4.5	4.5	4.5	4.5
VCC(Min)(V)							4.5	4.5	4.5
Voltage(Nom), В	5	5	5	5	5	5
Voltage(Nom)(V)							5	5	5
tpd @ Nom Voltage(Max), нс	12.3	12.3	12.3	12.3	12.3	12.3
tpd @ Nom Voltage(Max)(ns)							12.3	12.3	12.3

Экологический статус

Application Notes

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  Selecting the Right Level Translation Solution (Rev. A)
  PDF, 313 Кб, Версия: A, Файл опубликован: 22 июн 2004
  Supply voltages continue to migrate to lower nodes to support today's low-power high-performance applications. While some devices are capable of running at lower supply nodes others might not have this capability. To haveswitching compatibility between these devices the output of each driver must be compliant with the input of the receiver that it is driving. There are several level-translati
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  Introduction to Logic
  PDF, 93 Кб, Файл опубликован: 30 апр 2015
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  Shelf-Life Evaluation of Lead-Free Component Finishes
  PDF, 1.3 Мб, Файл опубликован: 24 май 2004
  The integrated circuit (IC) industry is converting to lead (Pb)-free termination finishes for leadframe-based packages. IC component users need to know the maximum length of time that components can be stored prior to being soldered. This study predicts shelf life of the primary Pb-free finishes being proposed by the industry. Components were exposed to a controlled environment, with known aging a
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  Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)
  PDF, 614 Кб, Версия: C, Файл опубликован: 2 дек 2015
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  Semiconductor Packing Material Electrostatic Discharge (ESD) Protection
  PDF, 337 Кб, Файл опубликован: 8 июл 2004
  Forty-eight-pin TSSOP components that were packaged using Texas Instruments (TI) standard packing methodology were subjected to electrical discharges between 0.5 and 20 kV as generated by an IEC ESD simulator to determine the level of ISD protection provided by the packing materials. The testing included trays tape and reel and magazines. Additional units were subjected to the same discharge
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  CMOS Power Consumption and CPD Calculation (Rev. B)
  PDF, 89 Кб, Версия: B, Файл опубликован: 1 июн 1997
  Reduction of power consumption makes a device more reliable. The need for devices that consume a minimum amount of power was a major driving force behind the development of CMOS technologies. As a result CMOS devices are best known for low power consumption. However for minimizing the power requirements of a board or a system simply knowing that CMOS devices may use less power than equivale
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  TI IBIS File Creation Validation and Distribution Processes
  PDF, 380 Кб, Файл опубликован: 29 авг 2002
  The Input/Output Buffer Information Specification (IBIS) also known as ANSI/EIA-656 has become widely accepted among electronic design automation (EDA) vendors semiconductor vendors and system designers as the format for digital electrical interface data. Because IBIS models do not reveal proprietary internal processes or architectural information semiconductor vendors? support for IBIS con
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  Implications of Slow or Floating CMOS Inputs (Rev. D)
  PDF, 260 Кб, Версия: D, Файл опубликован: 23 июн 2016
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  Designing With Logic (Rev. C)
  PDF, 186 Кб, Версия: C, Файл опубликован: 1 июн 1997
  Data sheets which usually give information on device behavior only under recommended operating conditions may only partially answer engineering questions that arise during the development of systems using logic devices. However information is frequently needed regarding the behavior of the device outside the conditions in the data sheet. Such questions might be:?How does a bus driver behave w
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  Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc
  PDF, 43 Кб, Файл опубликован: 1 апр 1996
  Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren

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• Semiconductors> Logic> Gate> NAND Gate