Datasheet Texas Instruments ADS54RF63 — Даташит
| Производитель | Texas Instruments |
| Серия | ADS54RF63 |
12-разрядный аналого-цифровой преобразователь (АЦП) с частотой дискретизации 550 MSPS
Datasheets
12-Bit 500-/550-MSPS Analog-to-Digital Converters datasheet
PDF, 2.0 Мб, Версия: E, Файл опубликован: 1 июл 2009
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Цены
 Купить ADS54RF63 на РадиоЛоцман.Цены — от 15 428 до 1 789 471 ₽22 предложений от 19 поставщиков TEXAS INSTRUMENTS ADS54RF63EVM Evaluation Module, 12Bit, 500MSPS, Analog to Digital Converter | |||
| ADS54RF63IPFPR Texas Instruments | 15 428 ₽ | ||
| ADS54RF63IPFPR Texas Instruments | от 17 985 ₽ | ||
| ADS54RF63-ADX4 Texas Instruments | по запросу | ||
| ADS54RF63 Texas Instruments | по запросу | ||
Статус
| ADS54RF63IPFP | ADS54RF63IPFPR | |
|---|---|---|
| Статус продукта | В производстве | В производстве |
| Доступность образцов у производителя | Нет | Нет |
Корпус / Упаковка / Маркировка
| ADS54RF63IPFP | ADS54RF63IPFPR | |
|---|---|---|
| N | 1 | 2 |
| Pin | 80 | 80 |
| Package Type | PFP | PFP |
| Industry STD Term | HTQFP | HTQFP |
| JEDEC Code | S-PQFP-G | S-PQFP-G |
| Package QTY | 96 | 1000 |
| Carrier | JEDEC TRAY (10+1) | LARGE T&R |
| Маркировка | ADS54RF63I | ADS54RF63I |
| Width (мм) | 12 | 12 |
| Length (мм) | 12 | 12 |
| Thickness (мм) | 1 | 1 |
| Pitch (мм) | .5 | .5 |
| Max Height (мм) | 1.2 | 1.2 |
| Mechanical Data | Скачать | Скачать |
Параметры
| Parameters / Models | ADS54RF63IPFP | ADS54RF63IPFPR |
|---|---|---|
| # Input Channels | 1 | 1 |
| Analog Input BW, МГц | 2300 | 2300 |
| Архитектура | Pipeline | Pipeline |
| DNL(Max), +/-LSB | 0.95 | 0.95 |
| DNL(Typ), +/-LSB | 0.5 | 0.5 |
| ENOB, Bits | 9.9 | 9.9 |
| INL(Max), +/-LSB | 2.5 | 2.5 |
| INL(Typ), +/-LSB | 0.7 | 0.7 |
| Input Buffer | Yes | Yes |
| Input Range, Vp-p | 2.2 | 2.2 |
| Interface | Parallel LVDS | Parallel LVDS |
| Рабочий диапазон температур, C | от -40 до 85 | от -40 до 85 |
| Package Group | HTQFP | HTQFP |
| Package Size: mm2:W x L, PKG | 80HTQFP: 196 mm2: 14 x 14(HTQFP) | 80HTQFP: 196 mm2: 14 x 14(HTQFP) |
| Power Consumption(Typ), mW | 2250 | 2250 |
| Rating | Catalog | Catalog |
| Reference Mode | Ext,Int | Ext,Int |
| Разрешение, Bits | 12 | 12 |
| SFDR, дБ | 76 | 76 |
| SINAD, дБ | 61.3 | 61.3 |
| SNR, дБ | 62.6 | 62.6 |
| Sample Rate(Max), MSPS | 550 | 550 |
Экологический статус
| ADS54RF63IPFP | ADS54RF63IPFPR | |
|---|---|---|
| RoHS | Совместим | Совместим |
Application Notes
- Clock jitter analyzed in the time domain, Part 1PDF, 302 Кб, Файл опубликован: 11 авг 2010
- Clock jitter analyzed in the time domain, Part 2PDF, 588 Кб, Файл опубликован: 15 ноя 2010
- Clock jitter analyzed in the time domain, Part 3PDF, 627 Кб, Файл опубликован: 16 сен 2011
- 4Q 2010 Issue Analog Applications JournalPDF, 1.3 Мб, Файл опубликован: 15 ноя 2010
- Signal Chain Noise Figure AnalysisPDF, 615 Кб, Файл опубликован: 29 окт 2014
- 3Q 2010 Issue Analog Applications JournalPDF, 1.5 Мб, Файл опубликован: 11 авг 2010
- High-Speed Analog-to-Digital Converter BasicsPDF, 1.1 Мб, Файл опубликован: 11 янв 2012
The goal of this document is to introduce a wide range of theories and topics that are relevant tohigh-speed analog-to-digital converters (ADC). This document provides details on sampling theorydata-sheet specifications ADC selection criteria and evaluation methods clock jitter and other commonsystem-level concerns. In addition some end-users will want to extend the performance capabil - 3Q 2011 Issue Analog Applications JournalPDF, 1.4 Мб, Файл опубликован: 16 сен 2011
- Журнал РїРѕ применению аналоговых компонентов 3Q 2011PDF, 3.9 Мб, Файл опубликован: 1 сен 2011
- CDCE62005 as Clock Solution for High-Speed ADCsPDF, 805 Кб, Файл опубликован: 4 сен 2008
TI has introduced a family of devices well-suited to meet the demands for high-speed ADC devices such as the ADS5527 which is capable of sampling up to 210 MSPS. To realize the full potential of these high-performance products it is imperative to provide a low phase noise clock source. The CDCE62005 clock synthesizer chip offers a real-world clocking solution to meet these stringent requirements - Smart Selection of ADC/DAC Enables Better Design of Software-Defined RadioPDF, 376 Кб, Файл опубликован: 28 апр 2009
This application report explains different aspects of selecting analog-to-digital and digital-to-analog data converters for Software-Defined Radio (SDR) applications. It also explains how ADS61xx ADCs and the DAC5688 from Texas Instruments fit properly for SDR designs. - Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A)PDF, 327 Кб, Версия: A, Файл опубликован: 10 сен 2010
This application report discusses the performance-related aspects of passive and active interfaces at the analog input of high-speed pipeline analog-to-digital converters (ADCs). The report simplifies the many possibilities into two main categories: passive and active interface circuits. The first section of the report gives an overview of equivalent models of buffered and unbuffered ADC input cir - Phase Noise Performance and Jitter Cleaning Ability of CDCE72010PDF, 2.3 Мб, Файл опубликован: 2 июн 2008
This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the reference clock VCXO clock and the CDCE72010 itself. This application report shows the phase noise performance at several of the most popular CDMA frequencies. This data helps the user to choose the rig - CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital ConvertersPDF, 424 Кб, Файл опубликован: 8 июн 2008
Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483 which is capable of sampling up to 135 MSPS. To realize the full potential of these high-performance devices the system must provide an extremely low phase noise clock source. The CDCE72010 clock synthesizer chip offers - Principles of Data Acquisition and Conversion (Rev. A)PDF, 132 Кб, Версия: A, Файл опубликован: 16 апр 2015
- A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)PDF, 425 Кб, Версия: B, Файл опубликован: 9 окт 2011
This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference. - Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)PDF, 69 Кб, Версия: A, Файл опубликован: 18 май 2015
Модельный ряд
Серия: ADS54RF63 (2)
Классификация производителя
- Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> High Speed ADCs (>10MSPS)
