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Datasheet Texas Instruments ADS58C48 — Даташит

ПроизводительTexas Instruments
СерияADS58C48
Datasheet Texas Instruments ADS58C48

Четырехканальный 11-разрядный аналого-цифровой преобразователь (АЦП) со скоростью 200 MSPS

Datasheets

Quad Channel IF Receiver with SNRBoost 3G datasheet
PDF, 2.7 Мб, Файл опубликован: 27 май 2010
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Цены

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Analog to Digital Converter Quad 11Bit 200MSPS ADC with SNRBoost Quad ADC Pipelined 200MSPS 11Bit Parallel/LVDS 80Pin HTQFP EP Tray
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Статус

ADS58C48IPFPADS58C48IPFPR
Статус продуктаВ производствеВ производстве
Доступность образцов у производителяНетНет

Корпус / Упаковка / Маркировка

ADS58C48IPFPADS58C48IPFPR
N12
Pin8080
Package TypePFPPFP
Industry STD TermHTQFPHTQFP
JEDEC CodeS-PQFP-GS-PQFP-G
Package QTY961000
CarrierJEDEC TRAY (10+1)LARGE T&R
МаркировкаADS58C48IADS58C48I
Width (мм)1212
Length (мм)1212
Thickness (мм)11
Pitch (мм).5.5
Max Height (мм)1.21.2
Mechanical DataСкачатьСкачать

Параметры

Parameters / ModelsADS58C48IPFP
ADS58C48IPFP
ADS58C48IPFPR
ADS58C48IPFPR
# Input Channels44
Analog Input BW, МГц600600
АрхитектураPipelinePipeline
DNL(Max), +/-LSB1.21.2
ENOB, Bits10.710.7
INL(Max), +/-LSB22
INL(Typ), +/-LSB11
Input BufferNoNo
Input Range, Vp-p22
InterfaceParallel CMOS,Parallel LVDSParallel CMOS,Parallel LVDS
Рабочий диапазон температур, Cот -40 до 85от -40 до 85
Package GroupHTQFPHTQFP
Package Size: mm2:W x L, PKG80HTQFP: 196 mm2: 14 x 14(HTQFP)80HTQFP: 196 mm2: 14 x 14(HTQFP)
Power Consumption(Typ), mW900900
RatingCatalogCatalog
Reference ModeIntInt
Разрешение, Bits1111
SFDR, дБ8484
SINAD, дБ66.666.6
SNR, дБ66.666.6
Sample Rate(Max), MSPS200200

Экологический статус

ADS58C48IPFPADS58C48IPFPR
RoHSСовместимСовместим

Application Notes

  • Using Windowing With SNRBoost 3G Technology
    PDF, 498 Кб, Файл опубликован: 30 авг 2010
    Coherency is a well-known requirement when using FFT techniques to examine the spectrum of the output of an analog-to-digital converter. SNRBoost(3G) technology results in loss in coherency, and this can be seen as an unstable noise floor in the spectrum. Windowing of the ADC output is a well-known solution to restore coherency and stable spectrum.However, windowing also modifies the amplitude o
  • Understanding Low-Amplitude Behavior of 11-bit ADCs
    PDF, 678 Кб, Файл опубликован: 22 окт 2011
    In TI’s line of high-speed analog-to-digital converters (ADCs) with SNRBoost technology, output amplitude tends to deviate from its expected value when the applied input amplitude is small. This application note explains this phenomenon and the reasons it occurs.
  • Power Supply Design for the ADS41xx (Rev. A)
    PDF, 401 Кб, Версия: A, Файл опубликован: 29 дек 2011
    System designers traditionally power the high-speed data converter in their systems from a low-noise, low-dropout linear regulator (LDO) in order to achieve the performance described in the analog-to-digital converter (ADC) data sheet. However, LDOs inherently are not very power efficient. Switching regulators, on the other hand, offer good power efficiency but typically come with higher output no
  • High-Speed Analog-to-Digital Converter Basics
    PDF, 1.1 Мб, Файл опубликован: 11 янв 2012
    The goal of this document is to introduce a wide range of theories and topics that are relevant tohigh-speed analog-to-digital converters (ADC). This document provides details on sampling theorydata-sheet specifications ADC selection criteria and evaluation methods clock jitter and other commonsystem-level concerns. In addition some end-users will want to extend the performance capabil
  • Band-Pass Filter Design Techniques for High-Speed ADCs
    PDF, 733 Кб, Файл опубликован: 27 фев 2012
    Several well-known methods exist for designing passive inductor-capacitor (LC) filters with resistive load terminations. However, when LC filters are used to drive the analog input pins of a high-speed analog-to-digital converter (ADC), special consideration must be given to the ADC input impedance. Not accounting for the ADC input impedance often results in a filter design that does not meet the
  • CDCE62005 as Clock Solution for High-Speed ADCs
    PDF, 805 Кб, Файл опубликован: 4 сен 2008
    TI has introduced a family of devices well-suited to meet the demands for high-speed ADC devices such as the ADS5527 which is capable of sampling up to 210 MSPS. To realize the full potential of these high-performance products it is imperative to provide a low phase noise clock source. The CDCE62005 clock synthesizer chip offers a real-world clocking solution to meet these stringent requirements
  • Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio
    PDF, 376 Кб, Файл опубликован: 28 апр 2009
    This application report explains different aspects of selecting analog-to-digital and digital-to-analog data converters for Software-Defined Radio (SDR) applications. It also explains how ADS61xx ADCs and the DAC5688 from Texas Instruments fit properly for SDR designs.
  • Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A)
    PDF, 327 Кб, Версия: A, Файл опубликован: 10 сен 2010
    This application report discusses the performance-related aspects of passive and active interfaces at the analog input of high-speed pipeline analog-to-digital converters (ADCs). The report simplifies the many possibilities into two main categories: passive and active interface circuits. The first section of the report gives an overview of equivalent models of buffered and unbuffered ADC input cir
  • Phase Noise Performance and Jitter Cleaning Ability of CDCE72010
    PDF, 2.3 Мб, Файл опубликован: 2 июн 2008
    This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the reference clock VCXO clock and the CDCE72010 itself. This application report shows the phase noise performance at several of the most popular CDMA frequencies. This data helps the user to choose the rig
  • CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters
    PDF, 424 Кб, Файл опубликован: 8 июн 2008
    Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483 which is capable of sampling up to 135 MSPS. To realize the full potential of these high-performance devices the system must provide an extremely low phase noise clock source. The CDCE72010 clock synthesizer chip offers
  • Principles of Data Acquisition and Conversion (Rev. A)
    PDF, 132 Кб, Версия: A, Файл опубликован: 16 апр 2015
  • A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
    PDF, 425 Кб, Версия: B, Файл опубликован: 9 окт 2011
    This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
  • Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
    PDF, 69 Кб, Версия: A, Файл опубликован: 18 май 2015

Модельный ряд

Серия: ADS58C48 (2)

Классификация производителя

  • Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> High Speed ADCs (>10MSPS)

На английском языке: Datasheet Texas Instruments ADS58C48

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