Datasheet Texas Instruments ADS6125 — Даташит
| Производитель | Texas Instruments |
| Серия | ADS6125 |
12-битный аналого-цифровой преобразователь (АЦП) с быстродействием 125 MSPS
Datasheets
12-BITS, 125/105/80/65 MSPS ADC WITH DDR LVDS and CMOS OUTPUTS datasheet
PDF, 2.4 Мб, Версия: A, Файл опубликован: 4 дек 2007
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Datasheet
Цены
 Купить ADS6125 на РадиоЛоцман.Цены — от 75 до 229 076 ₽24 предложений от 17 поставщиков Analog to Digital Converter Low Power 12Bit 125MSPS ADC with selectable parallel CMOS or LVDS outputs ADC Single Pipelined 125MSPS 12Bit... | |||
| ADS6125IRHB25 Texas Instruments | 75 ₽ | ||
| ADS6125IRHB Texas Instruments | 495 ₽ | ||
| ADS6125IRHBTG4 Texas Instruments | по запросу | ||
| ADS6125IRHBR Texas Instruments | по запросу | ||
Статус
| ADS6125IRHBR | ADS6125IRHBT | ADS6125IRHBTG4 | |
|---|---|---|---|
| Статус продукта | В производстве | В производстве | В производстве |
| Доступность образцов у производителя | Нет | Нет | Нет |
Корпус / Упаковка / Маркировка
| ADS6125IRHBR | ADS6125IRHBT | ADS6125IRHBTG4 | |
|---|---|---|---|
| N | 1 | 2 | 3 |
| Pin | 32 | 32 | 32 |
| Package Type | RHB | RHB | RHB |
| Industry STD Term | VQFN | VQFN | VQFN |
| JEDEC Code | S-PQFP-N | S-PQFP-N | S-PQFP-N |
| Package QTY | 3000 | 250 | 250 |
| Carrier | LARGE T&R | SMALL T&R | SMALL T&R |
| Маркировка | AZ6125 | AZ6125 | AZ6125 |
| Width (мм) | 5 | 5 | 5 |
| Length (мм) | 5 | 5 | 5 |
| Thickness (мм) | .9 | .9 | .9 |
| Pitch (мм) | .5 | .5 | .5 |
| Max Height (мм) | 1 | 1 | 1 |
| Mechanical Data | Скачать | Скачать | Скачать |
Параметры
| Parameters / Models | ADS6125IRHBR | ADS6125IRHBT | ADS6125IRHBTG4 |
|---|---|---|---|
| # Input Channels | 1 | 1 | 1 |
| Analog Input BW, МГц | 500 | 500 | |
| Analog Input BW(MHz) | 500 | ||
| Approx. Price (US$) | 27.01 | 1ku | ||
| Архитектура | Pipeline | Pipeline | Pipeline |
| DNL(Max), +/-LSB | 2 | 2 | |
| DNL(Max)(+/-LSB) | 2 | ||
| DNL(Typ), +/-LSB | 0.6 | 0.6 | |
| ENOB, Bits | 11.4 | 11.4 | |
| ENOB(Bits) | 11.4 | ||
| INL(Max), +/-LSB | 2 | 2 | |
| INL(Max)(+/-LSB) | 2 | ||
| INL(Typ), +/-LSB | 1 | 1 | |
| Input Buffer | No | No | |
| Input Range | 2 | 2 | 2V (p-p) |
| Interface | DDR LVDS,Parallel CMOS | DDR LVDS,Parallel CMOS | Parallel LVDS Serial SPI Interface |
| Рабочий диапазон температур, C | от -40 до 85 | от -40 до 85 | |
| Operating Temperature Range(C) | -40 to 85 | ||
| Package Group | VQFN | VQFN | VQFN |
| Package Size(mm2=WxL) | 32VQFN: 25 mm2: 5 x 5 | ||
| Package Size: mm2:W x L, PKG | 32VQFN: 25 mm2: 5 x 5(VQFN) | 32VQFN: 25 mm2: 5 x 5(VQFN) | |
| Power Consumption(Typ), mW | 417 | 417 | |
| Power Consumption(Typ)(mW) | 417 | ||
| Rating | Catalog | Catalog | Catalog |
| Reference Mode | Ext,Int | Ext,Int | Ext Int |
| Разрешение, Bits | 12 | 12 | |
| Resolution(Bits) | 12 | ||
| SFDR, дБ | 80 | 80 | |
| SFDR(dB) | 80 | ||
| SINAD, дБ | 70.6 | 70.6 | |
| SINAD(dB) | 70.6 | ||
| SNR, дБ | 71.3 | 71.3 | |
| SNR(dB) | 71.3 | ||
| Sample Rate (max)(SPS) | 125MSPS | ||
| Sample Rate(Max), MSPS | 125 | 125 |
Экологический статус
| ADS6125IRHBR | ADS6125IRHBT | ADS6125IRHBTG4 | |
|---|---|---|---|
| RoHS | Совместим | Совместим | Совместим |
| Бессвинцовая технология (Pb Free) | Да |
Application Notes
- Band-Pass Filter Design Techniques for High-Speed ADCsPDF, 733 Кб, Файл опубликован: 27 фев 2012
Several well-known methods exist for designing passive inductor-capacitor (LC) filters with resistive load terminations. However, when LC filters are used to drive the analog input pins of a high-speed analog-to-digital converter (ADC), special consideration must be given to the ADC input impedance. Not accounting for the ADC input impedance often results in a filter design that does not meet the - QFN Layout GuidelinesPDF, 1.3 Мб, Файл опубликован: 28 июл 2006
Board layout and stencil information for most Texas Instruments Quad Flat No-Lead (QFN) devices is provided in their data sheets. This document helps printed-circuit board designers understand and better use this information for optimal designs. - CDCE62005 as Clock Solution for High-Speed ADCsPDF, 805 Кб, Файл опубликован: 4 сен 2008
TI has introduced a family of devices well-suited to meet the demands for high-speed ADC devices such as the ADS5527 which is capable of sampling up to 210 MSPS. To realize the full potential of these high-performance products it is imperative to provide a low phase noise clock source. The CDCE62005 clock synthesizer chip offers a real-world clocking solution to meet these stringent requirements - Why Use Oversampling when Undersampling Can Do the Job? (Rev. A)PDF, 1.2 Мб, Версия: A, Файл опубликован: 19 июл 2013
- Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A)PDF, 2.0 Мб, Версия: A, Файл опубликован: 22 май 2015
- Smart Selection of ADC/DAC Enables Better Design of Software-Defined RadioPDF, 376 Кб, Файл опубликован: 28 апр 2009
This application report explains different aspects of selecting analog-to-digital and digital-to-analog data converters for Software-Defined Radio (SDR) applications. It also explains how ADS61xx ADCs and the DAC5688 from Texas Instruments fit properly for SDR designs. - Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A)PDF, 327 Кб, Версия: A, Файл опубликован: 10 сен 2010
This application report discusses the performance-related aspects of passive and active interfaces at the analog input of high-speed pipeline analog-to-digital converters (ADCs). The report simplifies the many possibilities into two main categories: passive and active interface circuits. The first section of the report gives an overview of equivalent models of buffered and unbuffered ADC input cir - Phase Noise Performance and Jitter Cleaning Ability of CDCE72010PDF, 2.3 Мб, Файл опубликован: 2 июн 2008
This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the reference clock VCXO clock and the CDCE72010 itself. This application report shows the phase noise performance at several of the most popular CDMA frequencies. This data helps the user to choose the rig - CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital ConvertersPDF, 424 Кб, Файл опубликован: 8 июн 2008
Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483 which is capable of sampling up to 135 MSPS. To realize the full potential of these high-performance devices the system must provide an extremely low phase noise clock source. The CDCE72010 clock synthesizer chip offers - Principles of Data Acquisition and Conversion (Rev. A)PDF, 132 Кб, Версия: A, Файл опубликован: 16 апр 2015
- A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)PDF, 425 Кб, Версия: B, Файл опубликован: 9 окт 2011
This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference. - Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)PDF, 69 Кб, Версия: A, Файл опубликован: 18 май 2015
Модельный ряд
Серия: ADS6125 (3)
Классификация производителя
- Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> High Speed ADCs (>10MSPS)
