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Datasheet Texas Instruments ADS830 — Даташит

ПроизводительTexas Instruments
СерияADS830
Datasheet Texas Instruments ADS830

8-Bit, 60-MSPS Analog-to-Digital Converter (ADC)

Datasheets

ADS830: SpeedPlus? 8-Bit, 60MHz Sampling Analog-To-Digital Converter datasheet
PDF, 554 Кб, Версия: A, Файл опубликован: 23 фев 2001
Выписка из документа
ADS830: SpeedPlus? 8-Bit, 60MHz Sampling Analog-To-Digital Converter (Rev. A)
PDF, 557 Кб, Версия: A, Файл опубликован: 23 фев 2001

Цены

32 предложений от 24 поставщиков
8-ми разрядный 1-канальный одиночный АЦП конвейерная архитектура 60Msps параллельная шина 20-Pin SSOP туба
AliExpress
Весь мир
ADS8344E ADS1254E ADS7844E ADS830E ADS831E IC
162 ₽
AiPCBA
Весь мир
ADS830E/2K5
Texas Instruments
267 ₽
Триема
Россия
ADS830E
Texas Instruments
1 007 ₽
Кремний
Россия и страны СНГ
ADS830E/2K5G4
Texas Instruments
по запросу
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Статус

ADS830EADS830E/2K5ADS830EG4
Статус продуктаВ производствеВ производствеВ производстве
Доступность образцов у производителяДаДаНет

Корпус / Упаковка / Маркировка

ADS830EADS830E/2K5ADS830EG4
N123
Pin202020
Package TypeDBQDBQDBQ
Industry STD TermSSOPSSOPSSOP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY50250050
CarrierTUBELARGE T&RTUBE
МаркировкаADS830EADS830EADS830E
Width (мм)3.93.93.9
Length (мм)8.658.658.65
Thickness (мм)1.51.51.5
Pitch (мм).64.64.64
Max Height (мм)1.751.751.75
Mechanical DataСкачатьСкачатьСкачать

Параметры

Parameters / ModelsADS830E
ADS830E
ADS830E/2K5
ADS830E/2K5
ADS830EG4
ADS830EG4
# Input Channels111
Analog Input BW, МГц300300
Analog Input BW(MHz)300
Approx. Price (US$)3.28 | 1ku
АрхитектураPipelinePipelinePipeline
DNL(Max), +/-LSB11
DNL(Max)(+/-LSB)1
DNL(Typ), +/-LSB0.10.1
ENOB, Bits7.77.7
ENOB(Bits)7.7
INL(Max), +/-LSB1.51.5
INL(Max)(+/-LSB)1.5
INL(Typ), +/-LSB0.30.3
Input BufferNoNo
Input Range1,21,21V / 2V (p-p)
InterfaceParallel CMOSParallel CMOSParallel CMOS
Рабочий диапазон температур, Cот -40 до 85от -40 до 85
Operating Temperature Range(C)-40 to 85
Package GroupSSOPSSOPSSOP
Package Size(mm2=WxL)20SSOP: 52 mm2: 6 x 8.65
Package Size: mm2:W x L, PKG20SSOP: 52 mm2: 6 x 8.65(SSOP)20SSOP: 52 mm2: 6 x 8.65(SSOP)
Power Consumption(Typ), mW215215
Power Consumption(Typ)(mW)215
RatingCatalogCatalogCatalog
Reference ModeExt,IntExt,IntInt
Ext
Разрешение, Bits88
Resolution(Bits)8
SFDR, дБ6565
SFDR(dB)65
SINAD, дБ4848
SINAD(dB)48
SNR, дБ49.549.5
SNR(dB)49.5
Sample Rate (max)(SPS)60MSPS
Sample Rate(Max), MSPS6060

Экологический статус

ADS830EADS830E/2K5ADS830EG4
RoHSСовместимСовместимСовместим
Бессвинцовая технология (Pb Free)Да

Application Notes

  • CDCE62005 as Clock Solution for High-Speed ADCs
    PDF, 805 Кб, Файл опубликован: 4 сен 2008
    TI has introduced a family of devices well-suited to meet the demands for high-speed ADC devices such as the ADS5527 which is capable of sampling up to 210 MSPS. To realize the full potential of these high-performance products it is imperative to provide a low phase noise clock source. The CDCE62005 clock synthesizer chip offers a real-world clocking solution to meet these stringent requirements
  • Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio
    PDF, 376 Кб, Файл опубликован: 28 апр 2009
    This application report explains different aspects of selecting analog-to-digital and digital-to-analog data converters for Software-Defined Radio (SDR) applications. It also explains how ADS61xx ADCs and the DAC5688 from Texas Instruments fit properly for SDR designs.
  • Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A)
    PDF, 327 Кб, Версия: A, Файл опубликован: 10 сен 2010
    This application report discusses the performance-related aspects of passive and active interfaces at the analog input of high-speed pipeline analog-to-digital converters (ADCs). The report simplifies the many possibilities into two main categories: passive and active interface circuits. The first section of the report gives an overview of equivalent models of buffered and unbuffered ADC input cir
  • Phase Noise Performance and Jitter Cleaning Ability of CDCE72010
    PDF, 2.3 Мб, Файл опубликован: 2 июн 2008
    This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the reference clock VCXO clock and the CDCE72010 itself. This application report shows the phase noise performance at several of the most popular CDMA frequencies. This data helps the user to choose the rig
  • CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters
    PDF, 424 Кб, Файл опубликован: 8 июн 2008
    Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483 which is capable of sampling up to 135 MSPS. To realize the full potential of these high-performance devices the system must provide an extremely low phase noise clock source. The CDCE72010 clock synthesizer chip offers
  • Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
    PDF, 69 Кб, Версия: A, Файл опубликован: 18 май 2015
  • A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
    PDF, 425 Кб, Версия: B, Файл опубликован: 9 окт 2011
    This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
  • Principles of Data Acquisition and Conversion (Rev. A)
    PDF, 132 Кб, Версия: A, Файл опубликован: 16 апр 2015

Модельный ряд

Серия: ADS830 (3)

Классификация производителя

  • Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> High Speed ADCs (>10MSPS)

На английском языке: Datasheet Texas Instruments ADS830

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