Datasheet Texas Instruments AM5K2E04 — Даташит

Производитель	Texas Instruments
Серия	AM5K2E04

Datasheets

Цены

Купить AM5K2E04 на РадиоЛоцман.Цены — от 2 843 до 49 216 ₽ 11 предложений от 11 поставщиков Микросхема Микроконтроллер, MPU KeyStone II RISC 32Bit 1400MHz 1.35V/1.5V/1.8V/3.3V 1089Pin FC-BGA
AiPCBA Весь мир	AM5K2E04XABD25 Texas Instruments	8 547 ₽	Купить
T-electron Россия и страны СНГ	AM5K2E04XABDA25 Texas Instruments	10 182 ₽	Купить
ЧипСити Россия	AM5K2E04XABDA4 Texas Instruments	12 317 ₽	Купить
Augswan Весь мир	AM5K2E04XABD4 Texas Instruments	по запросу	Купить

Статус

Корпус / Упаковка / Маркировка

Параметры

Parameters / Models	AM5K2E04XABD25	AM5K2E04XABD4	AM5K2E04XABDA25	AM5K2E04XABDA4
ARM CPU	4 ARM Cortex-A15	4 ARM Cortex-A15	4 ARM Cortex-A15	4 ARM Cortex-A15
ARM MHz, Max.	1250,1400	1250,1400	1250,1400	1250,1400
Applications	Industrial	Industrial	Industrial	Industrial
DRAM	DDR3,DDR3L	DDR3,DDR3L	DDR3,DDR3L	DDR3,DDR3L
EMAC	8-Port 1Gb Switch	8-Port 1Gb Switch	8-Port 1Gb Switch	8-Port 1Gb Switch
I2C	3	3	3	3
On-Chip L2 Cache	4096 KB (ARM Cluster)	4096 KB (ARM Cluster)	4096 KB (ARM Cluster)	4096 KB (ARM Cluster)
Operating Systems	SYS/BIOS,Linux,VxWorks,Integrity	SYS/BIOS,Linux,VxWorks,Integrity	SYS/BIOS,Linux,VxWorks,Integrity	SYS/BIOS,Linux,VxWorks,Integrity
Рабочий диапазон температур, C	от -40 до 100,0 до 85	от -40 до 100,0 до 85	от -40 до 100,0 до 85	от -40 до 100,0 до 85
Other On-Chip Memory	2048 KB	2048 KB	2048 KB	2048 KB
PCI/PCIe	4 PCIe Gen2	4 PCIe Gen2	4 PCIe Gen2	4 PCIe Gen2
Rating	Catalog	Catalog	Catalog	Catalog
SPI	3	3	3	3
Serial I/O	Hyperlink,I2C,SPI,TSIP,UART,USB	Hyperlink,I2C,SPI,TSIP,UART,USB	Hyperlink,I2C,SPI,TSIP,UART,USB	Hyperlink,I2C,SPI,TSIP,UART,USB
UART, SCI	2	2	2	2
USB	2	2	2	2

Экологический статус

Application Notes

• Скачать
  Clocking Spreadsheet for K2E Device Family
  PDF, 22 Кб, Файл опубликован: 26 янв 2017
  This document discusses the internal clocking architecture of Texas Instruments K2Ex Digital Signal Processors (DSP) using a provided clocking spreadsheet.The 66AK2Ex and AM5K2Ex devices have similar internal clocking architecture and peripherals except the corepac. The 66AK2Ex devices have both DSP corepac and ARM corepac, whereas, the AM5K2Ex devices have ARM corepac only.Use the K
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  Keystone II DDR3 Initialization
  PDF, 73 Кб, Файл опубликован: 26 янв 2015
  This application report provides a step-to-step initialization guide for the Keystone II device DDR3 SDRAM controller.
• Скачать
  Throughput Performance Guide for KeyStone II Devices (Rev. B)
  PDF, 866 Кб, Версия: B, Файл опубликован: 22 дек 2015
  This application report analyzes various performance measurements of the KeyStone II family of processors. It provides a throughput analysis of the various support peripherals to different end-points and memory access.
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  Keystone II DDR3 Debug Guide
  PDF, 143 Кб, Файл опубликован: 16 окт 2015
  This guide provides tools for use when debugging a failing DDR3 interface on a KeyStone II device.
• Скачать
  Power Management of KS2 Device (Rev. C)
  PDF, 61 Кб, Версия: C, Файл опубликован: 15 июл 2016
  This application report lists the steps to enable Class 0 Temperature Compensation (Class 0 TC) mode of SmartReflexв„ў Subsystem (SRSS) module available on such devices.
• Скачать
  Hardware Design Guide for KeyStone II Devices
  PDF, 1.8 Мб, Файл опубликован: 24 мар 2014
• Скачать
  PCIe Use Cases for KeyStone Devices
  PDF, 320 Кб, Файл опубликован: 13 дек 2011
• Скачать
  Clocking Design Guide for KeyStone Devices
  PDF, 1.5 Мб, Файл опубликован: 9 ноя 2010
• Скачать
  Optimizing Loops on the C66x DSP
  PDF, 585 Кб, Файл опубликован: 9 ноя 2010
• Скачать
  The C6000 Embedded Application Binary Interface Migration Guide (Rev. A)
  PDF, 20 Кб, Версия: A, Файл опубликован: 10 ноя 2010
  The C6000 compiler tools support a new ELF-based ABI named EABI. Prior to this time, the compiler only supported a single ABI, which is now named COFF ABI. The following compelling best-in-class features are available under the C6000 EABI:GeneralZero-init globals: “int gvar;” gets set to 0 before main runs.Dynamic linking: Add code to a running system.Native ROM
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  DDR3 Design Requirements for KeyStone Devices (Rev. B)
  PDF, 582 Кб, Версия: B, Файл опубликован: 5 июн 2014
• Скачать
  Multicore Programming Guide (Rev. B)
  PDF, 1.8 Мб, Версия: B, Файл опубликован: 29 авг 2012
  As application complexity continues to grow, we have reached a limit on increasing performance by merely scaling clock speed. To meet the ever-increasing processing demand, modern System-On-Chip solutions contain multiple processing cores. The dilemma is how to map applications to multicore devices. In this paper, we present a programming methodology for converting applications to run on multicore
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  Thermal Design Guide for DSP and ARM Application Processors (Rev. A)
  PDF, 324 Кб, Версия: A, Файл опубликован: 17 авг 2016
  This application report has been compiled to provide specific information and considerations regarding thermal design requirements for all DSP and ARM-based single and multi-core processors (collectively referred to as “processors”, “System-on-chip”, or “SoC”). The information contained within this document is intended to provide a minimum level of understanding with regards to the thermal require

Модельный ряд

Классификация производителя

• Semiconductors> Processors> Sitara Processors> ARM Cortex-A15> AM5K2Ex