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Datasheet Texas Instruments CD54HCT30 — Даташит

ПроизводительTexas Instruments
СерияCD54HCT30
Datasheet Texas Instruments CD54HCT30

High Speed CMOS Logic 8-Input NAND Gate

Datasheets

CD54/74HC30, CD54/74HCT30 datasheet
PDF, 821 Кб, Версия: D, Файл опубликован: 21 авг 2003
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High Speed CMOS Logic 8-Input NAND Gate
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Статус

5962-8974601CACD54HCT30F3A
Статус продуктаВ производствеВ производстве
Доступность образцов у производителяНетНет

Корпус / Упаковка / Маркировка

5962-8974601CACD54HCT30F3A
N12
Pin1414
Package TypeJJ
Industry STD TermCDIPCDIP
JEDEC CodeR-GDIP-TR-GDIP-T
Package QTY11
CarrierTUBETUBE
Width (мм)6.676.67
Length (мм)19.5619.56
Thickness (мм)4.574.57
Pitch (мм)2.542.54
Max Height (мм)5.085.08
Mechanical DataСкачатьСкачать
Маркировка5962-8974601CA

Параметры

Parameters / Models5962-8974601CA
5962-8974601CA
CD54HCT30F3A
CD54HCT30F3A
Bits11
F @ Nom Voltage(Max), Mhz2525
ICC @ Nom Voltage(Max), мА0.020.02
Тип входаTTLTTL
Рабочий диапазон температур, Cот -55 до 125от -55 до 125
Output Drive (IOL/IOH)(Max), мА4/-44/-4
Тип выходаCMOSCMOS
Package GroupCDIPCDIP
Package Size: mm2:W x L, PKGSee datasheet (CDIP)See datasheet (CDIP)
RatingMilitaryMilitary
Schmitt TriggerNoNo
Technology FamilyHCTHCT
VCC(Max), В5.55.5
VCC(Min), В4.54.5
tpd @ Nom Voltage(Max), нс3535

Экологический статус

5962-8974601CACD54HCT30F3A
RoHSSee ti.comSee ti.com

Application Notes

  • SN54/74HCT CMOS Logic Family Applications and Restrictions
    PDF, 102 Кб, Файл опубликован: 1 май 1996
    The TI SN54/74HCT family of CMOS devices is a subgroup of the SN74HC series with the HCT circuitry modified to meet the interfacing requirements of TTL outputs to high-speed CMOS inputs. The HCT devices can be driven by the TTL circuits directly without additional components. This document describes the TTL/HC interface the operating voltages circuit noise and power consumption. A Bergeron anal
  • TI IBIS File Creation Validation and Distribution Processes
    PDF, 380 Кб, Файл опубликован: 29 авг 2002
    The Input/Output Buffer Information Specification (IBIS) also known as ANSI/EIA-656 has become widely accepted among electronic design automation (EDA) vendors semiconductor vendors and system designers as the format for digital electrical interface data. Because IBIS models do not reveal proprietary internal processes or architectural information semiconductor vendors? support for IBIS con
  • Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)
    PDF, 614 Кб, Версия: C, Файл опубликован: 2 дек 2015
  • Semiconductor Packing Material Electrostatic Discharge (ESD) Protection
    PDF, 337 Кб, Файл опубликован: 8 июл 2004
    Forty-eight-pin TSSOP components that were packaged using Texas Instruments (TI) standard packing methodology were subjected to electrical discharges between 0.5 and 20 kV as generated by an IEC ESD simulator to determine the level of ISD protection provided by the packing materials. The testing included trays tape and reel and magazines. Additional units were subjected to the same discharge
  • Designing With Logic (Rev. C)
    PDF, 186 Кб, Версия: C, Файл опубликован: 1 июн 1997
    Data sheets which usually give information on device behavior only under recommended operating conditions may only partially answer engineering questions that arise during the development of systems using logic devices. However information is frequently needed regarding the behavior of the device outside the conditions in the data sheet. Such questions might be:?How does a bus driver behave w
  • Introduction to Logic
    PDF, 93 Кб, Файл опубликован: 30 апр 2015
  • Implications of Slow or Floating CMOS Inputs (Rev. D)
    PDF, 260 Кб, Версия: D, Файл опубликован: 23 июн 2016
  • CMOS Power Consumption and CPD Calculation (Rev. B)
    PDF, 89 Кб, Версия: B, Файл опубликован: 1 июн 1997
    Reduction of power consumption makes a device more reliable. The need for devices that consume a minimum amount of power was a major driving force behind the development of CMOS technologies. As a result CMOS devices are best known for low power consumption. However for minimizing the power requirements of a board or a system simply knowing that CMOS devices may use less power than equivale
  • Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc
    PDF, 43 Кб, Файл опубликован: 1 апр 1996
    Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren

Модельный ряд

Серия: CD54HCT30 (2)

Классификация производителя

  • Semiconductors> Space & High Reliability> Logic Products> Gate Products

На английском языке: Datasheet Texas Instruments CD54HCT30

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