Datasheet Texas Instruments CDC7005 — Даташит
Производитель | Texas Instruments |
Серия | CDC7005 |

Высокопроизводительный синхронизатор тактовых импульсов с низким фазовым шумом и малой асимметрией, который синхронизирует опорный тактовый сигнал с VCXO
Datasheets
3.3-V High Performance Clock Synthesizer & Jitter Cleaner datasheet
PDF, 1.1 Мб, Версия: L, Файл опубликован: 4 июн 2009
Выписка из документа
Цены
![]() 28 предложений от 24 поставщиков Микросхема Тактовый генератор, Clock Generator 3.5MHz to 180MHz Input 48Pin VQFN EP T/R | |||
CDC7005RGZR Texas Instruments | 554 ₽ | ||
CDC7005RGZR Texas Instruments | 853 ₽ | ||
CDC7005QFN-EVM Texas Instruments | по запросу | ||
CDC7005ZVA Texas Instruments | по запросу |
Статус
CDC7005RGZ | CDC7005RGZR | CDC7005RGZRG4 | CDC7005RGZT | CDC7005RGZTG4 | CDC7005ZVA | CDC7005ZVAR | CDC7005ZVAT | |
---|---|---|---|---|---|---|---|---|
Статус продукта | Анонсирован | В производстве | В производстве | В производстве | В производстве | В производстве | В производстве | В производстве |
Доступность образцов у производителя | Нет | Да | Нет | Нет | Да | Нет | Нет | Да |
Корпус / Упаковка / Маркировка
CDC7005RGZ | CDC7005RGZR | CDC7005RGZRG4 | CDC7005RGZT | CDC7005RGZTG4 | CDC7005ZVA | CDC7005ZVAR | CDC7005ZVAT | |
---|---|---|---|---|---|---|---|---|
N | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 |
Pin | 48 | 48 | 48 | 48 | 48 | 64 | 64 | 64 |
Package Type | RGZ | RGZ | RGZ | RGZ | RGZ | ZVA | ZVA | ZVA |
Industry STD Term | VQFN | VQFN | VQFN | VQFN | VQFN | BGA | BGA | BGA |
JEDEC Code | S-PQFP-N | S-PQFP-N | S-PQFP-N | S-PQFP-N | S-PQFP-N | S-PBGA-N | S-PBGA-N | S-PBGA-N |
Width (мм) | 7 | 7 | 7 | 7 | 7 | 8 | 8 | 8 |
Length (мм) | 7 | 7 | 7 | 7 | 7 | 8 | 8 | 8 |
Thickness (мм) | .9 | .9 | .9 | .9 | .9 | .96 | .96 | .96 |
Pitch (мм) | .5 | .5 | .5 | .5 | .5 | .8 | .8 | .8 |
Max Height (мм) | 1 | 1 | 1 | 1 | 1 | 1.4 | 1.4 | 1.4 |
Mechanical Data | Скачать | Скачать | Скачать | Скачать | Скачать | Скачать | Скачать | Скачать |
Package QTY | 2500 | 2500 | 250 | 250 | 348 | 1000 | 250 | |
Carrier | LARGE T&R | LARGE T&R | SMALL T&R | SMALL T&R | JEDEC TRAY (10+1) | LARGE T&R | SMALL T&R | |
Маркировка | CDC7005 | CDC7005 | CDC7005 | CDC7005 | CK7005Z | CK7005Z | CK7005Z |
Параметры
Parameters / Models | CDC7005RGZ![]() | CDC7005RGZR![]() | CDC7005RGZRG4![]() | CDC7005RGZT![]() | CDC7005RGZTG4![]() | CDC7005ZVA![]() | CDC7005ZVAR![]() | CDC7005ZVAT![]() |
---|---|---|---|---|---|---|---|---|
Approx. Price (US$) | 10.00 | 1ku | |||||||
Divider Ratio | 1 to 16 | 1 to 16 | 1 to 16 | 1 to 16 | 1 to 16 | 1 to 16 | 1 to 16 | 1 to 16 |
Input Level | LVCMOS (REF_CLK) LVPECL (VCXO_CLK) | LVCMOS (REF_CLK),LVPECL (VCXO_CLK) | LVCMOS (REF_CLK),LVPECL (VCXO_CLK) | LVCMOS (REF_CLK),LVPECL (VCXO_CLK) | LVCMOS (REF_CLK),LVPECL (VCXO_CLK) | LVCMOS (REF_CLK),LVPECL (VCXO_CLK) | LVCMOS (REF_CLK),LVPECL (VCXO_CLK) | LVCMOS (REF_CLK),LVPECL (VCXO_CLK) |
No. of Outputs | 5 | |||||||
Количество входов | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
Количество выходов | 5 | 5 | 5 | 5 | 5 | 5 | 5 | |
Рабочий диапазон температур, C | от -40 до 85 | от -40 до 85 | от -40 до 85 | от -40 до 85 | от -40 до 85 | от -40 до 85 | от -40 до 85 | |
Operating Temperature Range(C) | -40 to 85 | |||||||
Output Frequency(Max), МГц | 800 | 800 | 800 | 800 | 800 | 800 | 800 | |
Output Frequency(Max)(MHz) | 800 | |||||||
Output Frequency(Min), МГц | 10 | 10 | 10 | 10 | 10 | 10 | 10 | |
Output Frequency(Min)(MHz) | 10 | |||||||
Output Level | LVPECL | LVPECL | LVPECL | LVPECL | LVPECL | LVPECL | LVPECL | LVPECL |
Package Group | VQFN | VQFN | VQFN | VQFN | VQFN | BGA | BGA | BGA |
Package Size: mm2:W x L, PKG | 48VQFN: 49 mm2: 7 x 7(VQFN) | 48VQFN: 49 mm2: 7 x 7(VQFN) | 48VQFN: 49 mm2: 7 x 7(VQFN) | 48VQFN: 49 mm2: 7 x 7(VQFN) | 64BGA: 64 mm2: 8 x 8(BGA) | 64BGA: 64 mm2: 8 x 8(BGA) | 64BGA: 64 mm2: 8 x 8(BGA) | |
Package Size: mm2:W x L (PKG) | 48VQFN: 49 mm2: 7 x 7(VQFN) | |||||||
Rating | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog |
Special Features | OPAMP for Active Loop Filter Programmable Delay | OPAMP for Active Loop Filter,Programmable Delay | OPAMP for Active Loop Filter,Programmable Delay | OPAMP for Active Loop Filter,Programmable Delay | OPAMP for Active Loop Filter,Programmable Delay | OPAMP for Active Loop Filter,Programmable Delay | OPAMP for Active Loop Filter,Programmable Delay | OPAMP for Active Loop Filter,Programmable Delay |
Supply Voltage(Max), В | 3.6 | 3.6 | 3.6 | 3.6 | 3.6 | 3.6 | 3.6 | |
Supply Voltage(Max)(V) | 3.6 | |||||||
Supply Voltage(Min), В | 3 | 3 | 3 | 3 | 3 | 3 | 3 | |
Supply Voltage(Min)(V) | 3 |
Экологический статус
CDC7005RGZ | CDC7005RGZR | CDC7005RGZRG4 | CDC7005RGZT | CDC7005RGZTG4 | CDC7005ZVA | CDC7005ZVAR | CDC7005ZVAT | |
---|---|---|---|---|---|---|---|---|
RoHS | Не совместим | Совместим | Совместим | Совместим | Совместим | Совместим | Совместим | Совместим |
Бессвинцовая технология (Pb Free) | Нет | Да | Да | Да |
Application Notes
- Open Loop Phase-Noise Performance of CDC7005 at Various FrequenciesPDF, 353 Кб, Файл опубликован: 17 дек 2004
This application brief presents phase-noise data taken on Texas Instruments CDC7005 jitter cleaner and synchronizer PLL. The phase noise performance of CDC7005 depends on thephase noise of the reference clock, the voltage-controlled crystal oscillator (VCXO) clock,and the CDC7005 itself. This applications brief shows the phase noise performance of the CDC7005 clock synthesizer at the most popula - Phase Noise (Jitter) Performance of CDC7005 With Different VCXOs (Rev. A)PDF, 1.3 Мб, Версия: A, Файл опубликован: 19 июл 2005
- Using The CDC7005 as a 1:5 PECL Buffer w/Programmable Divider Ratio (Rev. B)PDF, 85 Кб, Версия: B, Файл опубликован: 15 дек 2009
- General Guidelines: CDC7005 as a Clock Synthesizer and Jitter Cleaner (Rev. A)PDF, 207 Кб, Версия: A, Файл опубликован: 16 дек 2003
- Basics of the CDC7005 Hold FunctionPDF, 233 Кб, Файл опубликован: 13 апр 2006
The CDC7005 is a high-performance clock synthesizer and jitter cleaner with implemented hold functionality. The hold functionality can be used for fail-safe operation if the reference clock is missing. This application report describes the basis, the advantages, and the limitations of the CDC7005 hold functionality. Additionally, a discrete realization of a simplified external hold function is sho - Implementing a CDC7005 Low Jitter Clock Solution for HIgh Speed High IF ADC DevPDF, 627 Кб, Файл опубликован: 25 июн 2004
Texas Instruments has introduced a family of devices suited to meet the demand for high-speed, high-IF sampling ADC devices like the ADS5500 ADC, capable of sampling at 125 MSPS. To realize the full potential of these high performance devices, it is imperative to provide an extremely low phase noise clock source. The CDC7005 clock distribution chip offers a real-world clocking solution to meet the
Модельный ряд
Серия: CDC7005 (8)
Классификация производителя
- Semiconductors> Clock and Timing> Clock Jitter Cleaners> Single-Loop PLL