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Datasheet Texas Instruments CDCE706 — Даташит

ПроизводительTexas Instruments
СерияCDCE706
Datasheet Texas Instruments CDCE706

Программируемый 3-PLL тактовый синтезатор/умножитель/делитель

Datasheets

Programmable 3-PLL Clock Synthesizer / Multiplier / Divider datasheet
PDF, 1.6 Мб, Версия: I, Файл опубликован: 7 фев 2008
Выписка из документа
ХРОНИКИ РОСТА: причины увеличения доли китайских полупроводниковых компонентов

Статус

CDCE706PWCDCE706PWG4CDCE706PWRCDCE706PWRG4
Статус продуктаВ производствеВ производствеВ производствеВ производстве
Доступность образцов у производителяНетНетДаДа

Корпус / Упаковка / Маркировка

CDCE706PWCDCE706PWG4CDCE706PWRCDCE706PWRG4
N1234
Pin20202020
Package TypePWPWPWPW
Industry STD TermTSSOPTSSOPTSSOPTSSOP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY707020002000
CarrierTUBETUBELARGE T&RLARGE T&R
МаркировкаCDCE706CDCE706CDCE706CDCE706
Width (мм)4.44.44.44.4
Length (мм)6.56.56.56.5
Thickness (мм)1111
Pitch (мм).65.65.65.65
Max Height (мм)1.21.21.21.2
Mechanical DataСкачатьСкачатьСкачатьСкачать

Параметры

Parameters / ModelsCDCE706PW
CDCE706PW
CDCE706PWG4
CDCE706PWG4
CDCE706PWR
CDCE706PWR
CDCE706PWRG4
CDCE706PWRG4
Input LevelCrystal,LVCMOS,DifferentialCrystal,LVCMOS,DifferentialCrystal,LVCMOS,DifferentialCrystal,LVCMOS,Differential
Количество выходов6666
Рабочий диапазон температур, Cот -40 до 85от -40 до 85от -40 до 85от -40 до 85
Output Frequency(Max), МГц300300300300
Output LevelLVCMOSLVCMOSLVCMOSLVCMOS
Package GroupTSSOPTSSOPTSSOPTSSOP
Package Size: mm2:W x L, PKG20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP)20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP)20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP)20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP)
ProgrammabilityEEPROMEEPROMEEPROMEEPROM
Special FeaturesIntegrated EEPROM,Pin Programming,SMBus,Spread Spectrum Clocking (SSC)Integrated EEPROM,Pin Programming,SMBus,Spread Spectrum Clocking (SSC)Integrated EEPROM,Pin Programming,SMBus,Spread Spectrum Clocking (SSC)Integrated EEPROM,Pin Programming,SMBus,Spread Spectrum Clocking (SSC)
VCC Core, В3.33.33.33.3
VCC Out, В3.33.33.33.3

Экологический статус

CDCE706PWCDCE706PWG4CDCE706PWRCDCE706PWRG4
RoHSСовместимСовместимСовместимСовместим

Application Notes

  • Recommended Terminations for the Differential Inputs of CDCE906/CDCE706
    PDF, 84 Кб, Файл опубликован: 10 авг 2006
    This application report describes how differential signals (LVDS, LVPECL, and HSTL) can be connected to CDCE706/CDCE906 differential inputs directly. The wide common-mode voltage and smaller swing required make the devices so versatile that they can receive any signal without any complicated coupling and biasing circuits.
  • CDCx706/x906 Termination and Signal Integrity Guidelines (Rev. A)
    PDF, 155 Кб, Версия: A, Файл опубликован: 28 ноя 2007
    This application report shows and evaluates different schemes for the CDCE706, CDCE906, CDC706, and CDC906. Guidelines for optimizing the series termination are discussed. Additionally, this report describes how the CDCx706/x906 family can be used to drive 1.8-V clock inputs.
  • High Speed Layout Guidelines (Rev. A)
    PDF, 762 Кб, Версия: A, Файл опубликован: 8 авг 2017
    Thisapplicationreportaddresseshigh-speedsignals,suchas clocksignalsand theirrouting,and givesdesignersa reviewof the importantcoherences.Withsomesimplerules,electromagneticinterferenceproblemscan be minimizedwithoutusingcomplicatedformulasand expensivesimulationtools.Section1givesa shortintroductionto theory,whileSection
  • Clock Recommendations for the DM643x EVM
    PDF, 121 Кб, Файл опубликован: 29 ноя 2006
    The DM643x evaluation module (EVM) requires several clock frequencies to run the system properly. The current clocking proposal of the low-cost EVM consists of the VCXO chip PI6CX100-27W, the PLL chip PLL1705, several bus drivers, and a few oscillaors and crystals. This application report discusses several optimized clocking proposals with the Texas Instruments new clock drivers and recommends a m
  • Troubleshooting I2C Bus Protocol
    PDF, 184 Кб, Файл опубликован: 19 окт 2009
    When using the I2Cв„ў bus protocol, the designer must ensure that the hardware complies with the I2C standard. This application report describes the I2C protocol and provides guidelines on debugging a missing acknowledgment, selecting the pullup resistors, or meeting the maximum capacitance load of an I2C bus. A conflict occurs if devices sharing the I2C bus have the same slave address. This

Модельный ряд

Классификация производителя

  • Semiconductors> Clock and Timing> Clock Generators> General Purpose

На английском языке: Datasheet Texas Instruments CDCE706

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