Datasheet Texas Instruments CDCE906PWRG4 — Даташит
| Производитель | Texas Instruments |
| Серия | CDCE906 |
| Модель | CDCE906PWRG4 |
Programmable 3-PLL Clock Synthesizer / Multiplier / Divider 20-TSSOP 0 to 70
Datasheets
Programmable 3-PLL Clock Synthesizer / Multiplier/Divider datasheet
PDF, 1.7 Мб, Версия: H, Файл опубликован: 11 дек 2007
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Цены
 Купить CDCE906PWRG4 на РадиоЛоцман.Цены — от 185 до 240 ₽7 предложений от 7 поставщиков Programmable PLL Clock Driver Triple 20Pin TSSOP T/R | |||
| CDCE906PWRG4 Texas Instruments | 185 ₽ | ||
| CDCE906PWRG4 Texas Instruments | 223 ₽ | ||
| CDCE906PWRG4 Texas Instruments | 240 ₽ | ||
| CDCE906PWRG4 | по запросу | ||
Статус
| Статус продукта | В производстве (Рекомендуется для новых разработок) |
| Доступность образцов у производителя | Нет |
Корпус / Упаковка / Маркировка
| Pin | 20 |
| Package Type | PW |
| Industry STD Term | TSSOP |
| JEDEC Code | R-PDSO-G |
| Width (мм) | 4.4 |
| Length (мм) | 6.5 |
| Thickness (мм) | 1 |
| Pitch (мм) | .65 |
| Max Height (мм) | 1.2 |
| Mechanical Data | Скачать |
Параметры
| Approx. Price (US$) | 2.20 | 1ku |
| Divider Ratio | Universal |
| Function | Clock Synthesizer Clock Multiplier Clock Divider |
| Input Level | Crystal LVCMOS Differential |
| Jitter-Peak to Peak(P-P) or Cycle to Cycle(C-C) | 60 ps |
| Operating Temperature Range(C) | 0 to 70 |
| Output Frequency(Max)(MHz) | 167 |
| Output Level | LVCMOS |
| Output Skew(ps) | 150 |
| Package Group | TSSOP |
| Package Size: mm2:W x L (PKG) | 20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP) |
| Rating | Catalog |
| Special Features | Integrated EEPROM Multiplier/Divider Spread Spectrum Clocking (SSC) |
| VCC(V) | 3.3 |
Экологический статус
| RoHS | Не совместим |
| Бессвинцовая технология (Pb Free) | Нет |
Комплекты разработчика и оценочные наборы
- Evaluation Modules & Boards: CDCE906-706PROGEVM
CDCE906 and CDCE706 programmable EVM
Статус продукта: В производстве (Рекомендуется для новых разработок) - Evaluation Modules & Boards: CDCE906-706PERFEVM
CDCE906 and CDCE706 EVM
Статус продукта: В производстве (Рекомендуется для новых разработок)
Application Notes
- Recommended Terminations for the Differential Inputs of CDCE906/CDCE706PDF, 84 Кб, Файл опубликован: 10 авг 2006
This application report describes how differential signals (LVDS, LVPECL, and HSTL) can be connected to CDCE706/CDCE906 differential inputs directly. The wide common-mode voltage and smaller swing required make the devices so versatile that they can receive any signal without any complicated coupling and biasing circuits. - CDCx706/x906 Termination and Signal Integrity Guidelines (Rev. A)PDF, 155 Кб, Версия: A, Файл опубликован: 28 ноя 2007
This application report shows and evaluates different schemes for the CDCE706, CDCE906, CDC706, and CDC906. Guidelines for optimizing the series termination are discussed. Additionally, this report describes how the CDCx706/x906 family can be used to drive 1.8-V clock inputs. - High Speed Layout Guidelines (Rev. A)PDF, 762 Кб, Версия: A, Файл опубликован: 8 авг 2017
Thisapplicationreportaddresseshigh-speedsignals,suchas clocksignalsand theirrouting,and givesdesignersa reviewof the importantcoherences.Withsomesimplerules,electromagneticinterferenceproblemscan be minimizedwithoutusingcomplicatedformulasand expensivesimulationtools.Section1givesa shortintroductionto theory,whileSection - Clock Recommendations for the DM643x EVMPDF, 121 Кб, Файл опубликован: 29 ноя 2006
The DM643x evaluation module (EVM) requires several clock frequencies to run the system properly. The current clocking proposal of the low-cost EVM consists of the VCXO chip PI6CX100-27W, the PLL chip PLL1705, several bus drivers, and a few oscillaors and crystals. This application report discusses several optimized clocking proposals with the Texas Instruments new clock drivers and recommends a m - Troubleshooting I2C Bus ProtocolPDF, 184 Кб, Файл опубликован: 19 окт 2009
When using the I2Cв„ў bus protocol, the designer must ensure that the hardware complies with the I2C standard. This application report describes the I2C protocol and provides guidelines on debugging a missing acknowledgment, selecting the pullup resistors, or meeting the maximum capacitance load of an I2C bus. A conflict occurs if devices sharing the I2C bus have the same slave address. This
Модельный ряд
Серия: CDCE906 (4)
- CDCE906PW CDCE906PWG4 CDCE906PWR CDCE906PWRG4
Классификация производителя
- Semiconductors > Clock and Timing > Clock Generators > Spread-Spectrum Clocks
