Datasheet Texas Instruments CDCVF111 — Даташит
| Производитель | Texas Instruments |
| Серия | CDCVF111 |
Дифференциальный драйвер часов 1:9 LVPECL
Datasheets
1:9 Differential LVPECL Clock Driver datasheet
PDF, 951 Кб, Версия: B, Файл опубликован: 7 июн 2002
Выписка из документа
 Купить CDCVF111 на РадиоЛоцман.Цены — от 333 до 3 147 ₽20 предложений от 20 поставщиков Микросхема Тактовый амортизатор, драйвер, схема фазовой автоподстройки, Clock Fanout Buffer 9Out 1IN 1:9 28Pin PLCC T/R | |||
| CDCVF111FNRG4 Texas Instruments | 997 ₽ | ||
| CDCVF111FNR Rochester Electronics | 1 019 ₽ | ||
| CDCVF111FNRG4 Texas Instruments | по запросу | ||
| CDCVF111FN Texas Instruments | по запросу | ||
Статус
| CDCVF111FN | CDCVF111FNG4 | CDCVF111FNR | CDCVF111FNRG4 | |
|---|---|---|---|---|
| Статус продукта | В производстве | В производстве | В производстве | В производстве |
| Доступность образцов у производителя | Нет | Да | Нет | Да |
Корпус / Упаковка / Маркировка
| CDCVF111FN | CDCVF111FNG4 | CDCVF111FNR | CDCVF111FNRG4 | |
|---|---|---|---|---|
| N | 1 | 2 | 3 | 4 |
| Pin | 28 | 28 | 28 | 28 |
| Package Type | FN | FN | FN | FN |
| Industry STD Term | PLCC | PLCC | PLCC | PLCC |
| JEDEC Code | S-PQCC-J | S-PQCC-J | S-PQCC-J | S-PQCC-J |
| Package QTY | 37 | 37 | 750 | 750 |
| Carrier | TUBE | TUBE | LARGE T&R | LARGE T&R |
| Маркировка | CDCVF111 | CDCVF111 | CDCVF111 | CDCVF111 |
| Width (мм) | 11.51 | 11.51 | 11.51 | 11.51 |
| Length (мм) | 11.51 | 11.51 | 11.51 | 11.51 |
| Thickness (мм) | 4.06 | 4.06 | 4.06 | 4.06 |
| Pitch (мм) | 1.27 | 1.27 | 1.27 | 1.27 |
| Max Height (мм) | 4.57 | 4.57 | 4.57 | 4.57 |
| Mechanical Data | Скачать | Скачать | Скачать | Скачать |
Параметры
| Parameters / Models | CDCVF111FN | CDCVF111FNG4 | CDCVF111FNR | CDCVF111FNRG4 |
|---|---|---|---|---|
| Input Frequency(Max), МГц | 650 | 650 | 650 | 650 |
| Input Level | LVPECL | LVPECL | LVPECL | LVPECL |
| Количество выходов | 9 | 9 | 9 | 9 |
| Рабочий диапазон температур, C | от -40 до 85 | от -40 до 85 | от -40 до 85 | от -40 до 85 |
| Output Frequency(Max), МГц | 650 | 650 | 650 | 650 |
| Output Level | LVPECL | LVPECL | LVPECL | LVPECL |
| Package Group | PLCC | PLCC | PLCC | PLCC |
| Package Size: mm2:W x L, PKG | 28PLCC: 132 mm2: 11.51 x 11.51(PLCC) | 28PLCC: 132 mm2: 11.51 x 11.51(PLCC) | 28PLCC: 132 mm2: 11.51 x 11.51(PLCC) | 28PLCC: 132 mm2: 11.51 x 11.51(PLCC) |
| Rating | Catalog | Catalog | Catalog | Catalog |
| VCC, В | 3.3 | 3.3 | 3.3 | 3.3 |
| VCC Out, В | 3.3 | 3.3 | 3.3 | 3.3 |
Экологический статус
| CDCVF111FN | CDCVF111FNG4 | CDCVF111FNR | CDCVF111FNRG4 | |
|---|---|---|---|---|
| RoHS | Совместим | Совместим | Совместим | Совместим |
Application Notes
- Using TI's CDC111 W/SLK2501 Serial Gigabit Transceiver for SONET, EthernetPDF, 72 Кб, Файл опубликован: 31 окт 2001
SONET/SDH and gigabit ethernet applications all have stringent timing requirements, which mandate the use of low-skew, low-jitter clock distribution. Texas Instruments has developed two products targeting these systems applications. The first product is the CDCVF111, a 1:9 low-skew, low-jitter differential LVPECL clock driver. The second is the SLK2501, a multirate (OC-48/24/12/3) serial gigabit t - Using TI's CDC111/CDCVF111 W/ TLK3104SA Serial Transceiver for Gigabit EthernetPDF, 79 Кб, Файл опубликован: 31 окт 2001
This application report discusses jitter transfer of TI's CDC111/CDCVF111 clock drivers when driving TI's TLK3104 serial gigabit transceiver. This report summarizes worst case peak-to-peak and RMS jitter measurements taken at various points, as indicated in Figures 1 and 2. Two different clock sources are used to provide the reference clock signal for the clock drivers, and the output of each cloc - Jitter Performance of TI's CDC111/CDCVF111PDF, 149 Кб, Файл опубликован: 29 окт 2001
This application report discusses various jitter measurements of TI?s CDC111/CDCVF111 while being driven by three different clock sources (VCXOs). The data contained in this report shows that the CDC111/CDCVF111 does not add more than 3 ps of peak-to-peak jitter. Hence, the CDC111 and CDCVF111 are ideal for various SONET and Gigabit Ethernet applications where skew and jitter are of major concern. - Output Jitter of CDC111/CDCVF111 in ASIC Networking ApplicationPDF, 361 Кб, Файл опубликован: 2 ноя 2001
This report contains a number of peak-to-peak and cycle-to-cycle jitter measurements of TI?s CDC111 and CDCVF111 clock driver. In this ASIC event, both the CDC111/CDCVF111 clock drivers are used as a master clock distribution for the Gandalf Macro Family Testchip. Comprehensive jitter data as well as output signal levels were taken and thus are included for completeness. - DC-Coupling Between Differential LVPECL, LVDS, HSTL, and CMLPDF, 135 Кб, Файл опубликован: 19 фев 2003
- AC Coupling Between Differential LVPECL, LVDS, HSTL and CML (Rev. C)PDF, 417 Кб, Версия: C, Файл опубликован: 17 окт 2007
This report provides a quick reference of ac-coupling techniques for interfacing between different logic levels. The four differential signaling levels found in this reportare low-voltage positive-referenced emitter coupled logic (LVPECL), low-voltage differential signals (LVDS), high-speed transceiver logic (HSTL), and current-modelogic (CML). From these four differential signaling levels, 16
Модельный ряд
Серия: CDCVF111 (4)
Классификация производителя
- Semiconductors> Clock and Timing> Clock Buffers> Differential
