Datasheet Texas Instruments DAC5672 — Даташит
Производитель | Texas Instruments |
Серия | DAC5672 |

Двухканальный 14-битный цифро-аналоговый преобразователь (ЦАП) со скоростью 275 MSPS
Datasheets
Dual 14 Bit 275 MSPS DAC datasheet
PDF, 1.7 Мб, Версия: D, Файл опубликован: 4 авг 2017
Выписка из документа
Цены
![]() 38 предложений от 25 поставщиков Микросхема Преобразователь DA, TEXAS INSTRUMENTS DAC5672AIPFB Digital to Analog Converter, 14Bit, 275MSPS, Parallel, 3V to 3.6V, QFP, 48Pins | |||
DAC5672IPFBR Texas Instruments | 984 ₽ | ||
DAC5672IPFBR Texas Instruments | от 3 511 ₽ | ||
DAC5672IPFB Texas Instruments | по запросу | ||
DAC5672A Texas Instruments | по запросу |
Статус
DAC5672IPFB | DAC5672IPFBR | DAC5672IPFBRG4 | |
---|---|---|---|
Статус продукта | В производстве | В производстве | В производстве |
Доступность образцов у производителя | Да | Нет | Нет |
Корпус / Упаковка / Маркировка
DAC5672IPFB | DAC5672IPFBR | DAC5672IPFBRG4 | |
---|---|---|---|
N | 1 | 2 | 3 |
Pin | 48 | 48 | 48 |
Package Type | PFB | PFB | PFB |
Industry STD Term | TQFP | TQFP | TQFP |
JEDEC Code | S-PQFP-G | S-PQFP-G | S-PQFP-G |
Package QTY | 250 | 1000 | 1000 |
Carrier | JEDEC TRAY (10+1) | LARGE T&R | LARGE T&R |
Маркировка | DAC5672I | DAC5672I | DAC5672I |
Width (мм) | 7 | 7 | 7 |
Length (мм) | 7 | 7 | 7 |
Thickness (мм) | 1 | 1 | 1 |
Pitch (мм) | .5 | .5 | .5 |
Max Height (мм) | 1.2 | 1.2 | 1.2 |
Mechanical Data | Скачать | Скачать | Скачать |
Параметры
Parameters / Models | DAC5672IPFB![]() | DAC5672IPFBR![]() | DAC5672IPFBRG4![]() |
---|---|---|---|
Approx. Price (US$) | 13.40 | 1ku | ||
Архитектура | Current Source | Current Source | Current Source |
DAC Channels | 2 | 2 | |
DAC: Channels | 2 | ||
IMD3(dBc) | 79 | ||
Interface | Parallel CMOS | Parallel CMOS | Parallel CMOS |
Interpolation | 1x | 1x | |
Рабочий диапазон температур, C | от -40 до 85 | от -40 до 85 | |
Operating Temperature Range(C) | -40 to 85 | ||
Package Group | TQFP | TQFP | TQFP |
Package Size(mm2=WxL) | 48TQFP: 81 mm2: 9 x 9 | ||
Package Size: mm2:W x L, PKG | 48TQFP: 81 mm2: 9 x 9(TQFP) | 48TQFP: 81 mm2: 9 x 9(TQFP) | |
Power Consumption(Typ), mW | 330 | 330 | |
Power Consumption(Typ)(mW) | 330 | ||
Rating | Catalog | Catalog | Catalog |
Разрешение, Bits | 14 | 14 | |
Resolution(Bits) | 14 | ||
SFDR, дБ | 84 | 84 | |
SFDR(dB) | 84 | ||
SNR(dB) | 77 | ||
Sample / Update Rate, MSPS | 275 | 275 | |
Sample / Update Rate(MSPS) | 275 | ||
Settling Time(?s) | 0.02 |
Экологический статус
DAC5672IPFB | DAC5672IPFBR | DAC5672IPFBRG4 | |
---|---|---|---|
RoHS | Совместим | Совместим | Совместим |
Бессвинцовая технология (Pb Free) | Да |
Application Notes
- Passive Terminations for Current Output DACsPDF, 244 Кб, Файл опубликован: 10 ноя 2008
The correct implementation of the high-speed DAC output termination is critical to achieving the best possible performance. The typical application involves choosing the correct network to create the necessary dc bias levels and correct effective impedance load to keep the output voltage within the compliance levels. This ensures that the maximum output signal amplitude and optimum ac performance - High Speed Digital-to-Analog Converters Basics (Rev. A)PDF, 829 Кб, Версия: A, Файл опубликован: 23 окт 2012
- Wideband Complementary Current Output DAC Single-Ended InterfacePDF, 597 Кб, Файл опубликован: 21 июн 2005
High-speed digital-to-analog converters (DACs) most often use a transformer-coupled output stage. In applications where this configuration is not practical, a single op ampdifferential to single-ended stage has often been used. This application note steps through the exact design equations required to achieve gain matching from each output as well as a matched input impedance to each of the DA - Phase Noise Performance and Jitter Cleaning Ability of CDCE72010PDF, 2.3 Мб, Файл опубликован: 2 июн 2008
This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the reference clock VCXO clock and the CDCE72010 itself. This application report shows the phase noise performance at several of the most popular CDMA frequencies. This data helps the user to choose the rig - CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital ConvertersPDF, 424 Кб, Файл опубликован: 8 июн 2008
Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483 which is capable of sampling up to 135 MSPS. To realize the full potential of these high-performance devices the system must provide an extremely low phase noise clock source. The CDCE72010 clock synthesizer chip offers - Passive Terminations for Current Output DACsPDF, 244 Кб, Файл опубликован: 10 ноя 2008
The correct implementation of the high-speed DAC output termination is critical to achieving the best possible performance. The typical application involves choosing the correct network to create the - High Speed, Digital-to-Analog Converters Basics (Rev. A)PDF, 829 Кб, Версия: A, Файл опубликован: 23 окт 2012
High Speed DAC (>10MSPS) High Speed, Digital-to-Analog Converters Basics - Wideband Complementary Current Output DAC Single-Ended InterfacePDF, 597 Кб, Файл опубликован: 21 июн 2005
High-speed digital-to-analog converters (DACs) most often use a transformer-coupled output stage. In applications where this configuration is not practical, a single op amp differential to single-end - Phase Noise Performance and Jitter Cleaning Ability of CDCE72010PDF, 2.3 Мб, Файл опубликован: 2 июн 2008
This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the refe - CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital ConvertersPDF, 424 Кб, Файл опубликован: 8 июн 2008
Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed, high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483, which is capable of - Superposition: The Hidden DAC Linearity ErrorPDF, 106 Кб, Файл опубликован: 2 окт 2000
A digital-to analog converter (DAC) translates digital signals to analog signals. For example, a 12-bit DAC takes a 12-bit binary number, called an input code, and converts it into one of 4,096 analog
Модельный ряд
Серия: DAC5672 (3)
Классификация производителя
- Semiconductors> Data Converters> Digital-to-Analog Converters (DACs)> High Speed DACs (>10MSPS)