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Documents DS90LV028A
SNLS013F – JUNE 1998 – REVISED JUNE 2016 DS90LV028A 3-V LVDS Dual CMOS Differential Line Receiver
1 Features 3 Description The DS90LV028A is a dual CMOS differential line
receiver designed for applications requiring ultra low
power dissipation, low noise and high data rates. The
device is designed to support data rates in excess of
400-Mbps (200 MHz) utilizing Low Voltage Differential
Signaling (LVDS) technology. 1 >400-Mbps (200 MHz) Switching Rates
50-ps Differential Skew (Typical)
0.1-ns Channel-to-Channel Skew (Typical)
2.5-ns Maximum Propagation Delay
3.3-V Power Supply Design
Flow-Through Pinout
Power Down High Impedance on LVDS Inputs
Low Power Design (18 mW at 3.3-V static)
Interoperable with Existing 5-V LVDS Networks
Accepts Small Swing (350 mV Typical) Differential
Signal Levels …
