Datasheet Texas Instruments SN74ALVC7805 — Даташит
| Производитель | Texas Instruments |
| Серия | SN74ALVC7805 |
Синхронная память FIFO 256 x 18, 3,3 В
Datasheets
256 X 18 Low-Power Clocked First-In, First-Out Memory datasheet
PDF, 410 Кб, Версия: A, Файл опубликован: 1 апр 1998
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Цены
 Купить SN74ALVC7805 на РадиоЛоцман.Цены — от 65 до 870 ₽24 предложений от 21 поставщиков IC 256X18 SYNC FIFO MEM 56-SSOP / Synchronous FIFO 4.5K (256 x 18) Uni-Directional 50MHz 13ns 56-SSOP | |||
| SN74ALVC7805-40DL Texas Instruments | 870 ₽ | ||
| SN74ALVC7805-20DLR Texas Instruments | по запросу | ||
| SN74ALVC7805-20 Texas Instruments | по запросу | ||
| SN74ALVC7805-20DL Texas Instruments | по запросу | ||
Статус
| SN74ALVC7805-40DLR | |
|---|---|
| Статус продукта | В производстве |
| Доступность образцов у производителя | Нет |
Корпус / Упаковка / Маркировка
| SN74ALVC7805-40DLR | |
|---|---|
| N | 1 |
| Pin | 56 |
| Package Type | DL |
| Industry STD Term | SSOP |
| JEDEC Code | R-PDSO-G |
| Package QTY | 1000 |
| Carrier | LARGE T&R |
| Маркировка | ALVC7805-40 |
| Width (мм) | 7.49 |
| Length (мм) | 18.41 |
| Thickness (мм) | 2.59 |
| Pitch (мм) | .635 |
| Max Height (мм) | 2.79 |
| Mechanical Data | Скачать |
Экологический статус
| SN74ALVC7805-40DLR | |
|---|---|
| RoHS | Совместим |
Application Notes
- Benefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A)PDF, 154 Кб, Версия: A, Файл опубликован: 8 сен 1999
In the last few years the trend toward reducing supply voltage (VCC) has continued as reflected in an additional specification of 2.5-V VCC for the AVC ALVT ALVC LVC LV and the CBTLV families.In this application report the different logic levels at VCC of 5 V 3.3 V 2.5 V and 1.8 V are compared. Within the report the possibilities for migration from 5-V logic and 3.3-V logic families - TI SN74ALVC16835 Component Specification Analysis for PC100PDF, 43 Кб, Файл опубликован: 3 авг 1998
The PC100 standard establishes design parameters for the PC SDRAM DIMM that is designed to operate at 100 MHz. The 168-pin, 8-byte, registered SDRAM DIMM is a JEDEC-defined device (JC-42.5-96-146A). Some of the defined signal paths include data signals, address signals, and control signals. This application report discusses the SN74ALVC16835 18-bit universal bus driver that is available from T - Power-Dissipation Calculations for TI FIFO Products (Rev. A)PDF, 106 Кб, Версия: A, Файл опубликован: 1 мар 1996
Low power consumption is a major advantage of TI FIFO products. Power calculations are required to meet design requirements for chip temperature and system power. This document assists component and system designers in evaluating power consumption for the ACT and ABT FIFO products. Two examples of power calculations, one for the SN74ACT3632 bi-directional CMOS FIFO and one for the BiCMOS SN74ABT36 - Logic Solutions for PC-100 SDRAM Registered DIMMs (Rev. A)PDF, 96 Кб, Версия: A, Файл опубликован: 13 май 1998
Design of high-performance personal computer (PC) systems that are capable of meeting the needs imposed by modern operating systems and software includes the use of large banks of SDRAMs on DIMMs (see Figure 1).To meet the demands of stable functionality over the broad spectrum of operating environments, meet system timing needs, and to support data integrity, the loads presented by the large - 16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)PDF, 895 Кб, Версия: B, Файл опубликован: 22 май 2002
TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa
Модельный ряд
Серия: SN74ALVC7805 (1)
Классификация производителя
- Semiconductors> Logic> Flip-Flop/Latch/Register> FIFO Register
