Datasheet Texas Instruments SN74ALVCH16973 — Даташит

Производитель	Texas Instruments
Серия	SN74ALVCH16973

Datasheets

Цены

Купить SN74ALVCH16973 на РадиоЛоцман.Цены — от 74 до 633 ₽ 24 предложений от 17 поставщиков 8Bit Bus Transceiver and Transparent D-Type Latch with 4Independent Buffers 48-TSSOP -40℃ to 85℃
EIS Components Весь мир	SN74ALVCH16973DLR Texas Instruments	74 ₽	Купить
ЧипСити Россия	SN74ALVCH16973DGGR Texas Instruments	138 ₽	Купить
Океан Электроники Россия	SN74ALVCH16973DGGR Texas Instruments	по запросу	Купить
Acme Chip Весь мир	SN74ALVCH16973DGG Texas Instruments	по запросу	Купить

Статус

Корпус / Упаковка / Маркировка

Параметры

Parameters / Models	SN74ALVCH16973DGGR
Bits	8
F @ Nom Voltage(Max), Mhz	100
ICC @ Nom Voltage(Max), мА	0.03
Рабочий диапазон температур, C	от -40 до 85
Output Drive (IOL/IOH)(Max), мА	-24/24
Package Group	TSSOP
Package Size: mm2:W x L, PKG	48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)
Rating	Catalog
Schmitt Trigger	No
Technology Family	ALVC
VCC(Max), В	3.6
VCC(Min), В	1.65
Voltage(Nom), В	1.8,2.5,3.3
tpd @ Nom Voltage(Max), нс	2.2,3.2,3

Экологический статус

Application Notes

• Скачать
  TI SN74ALVC16835 Component Specification Analysis for PC100
  PDF, 43 Кб, Файл опубликован: 3 авг 1998
  The PC100 standard establishes design parameters for the PC SDRAM DIMM that is designed to operate at 100 MHz. The 168-pin, 8-byte, registered SDRAM DIMM is a JEDEC-defined device (JC-42.5-96-146A). Some of the defined signal paths include data signals, address signals, and control signals. This application report discusses the SN74ALVC16835 18-bit universal bus driver that is available from T
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  Logic Solutions for PC-100 SDRAM Registered DIMMs (Rev. A)
  PDF, 96 Кб, Версия: A, Файл опубликован: 13 май 1998
  Design of high-performance personal computer (PC) systems that are capable of meeting the needs imposed by modern operating systems and software includes the use of large banks of SDRAMs on DIMMs (see Figure 1).To meet the demands of stable functionality over the broad spectrum of operating environments, meet system timing needs, and to support data integrity, the loads presented by the large
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  Bus-Hold Circuit
  PDF, 418 Кб, Файл опубликован: 5 фев 2001
  When designing systems that include CMOS devices, designers must pay special attention to the operating condition in which all of the bus drivers are in an inactive, high-impedance condition (3-state). Unless special measures are taken, this condition can lead to undefined levels and, thus, to a significant increase in the device?s power dissipation. In extreme cases, this leads to oscillation of
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  16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)
  PDF, 895 Кб, Версия: B, Файл опубликован: 22 май 2002
  TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa
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  Benefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A)
  PDF, 154 Кб, Версия: A, Файл опубликован: 8 сен 1999
  In the last few years the trend toward reducing supply voltage (VCC) has continued as reflected in an additional specification of 2.5-V VCC for the AVC ALVT ALVC LVC LV and the CBTLV families.In this application report the different logic levels at VCC of 5 V 3.3 V 2.5 V and 1.8 V are compared. Within the report the possibilities for migration from 5-V logic and 3.3-V logic families

Модельный ряд

Классификация производителя

• Semiconductors> Logic> Buffer/Driver/Transceiver> Standard Transceiver