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Datasheet Texas Instruments SN74ALVCHR16601 — Даташит

ПроизводительTexas Instruments
СерияSN74ALVCHR16601
Datasheet Texas Instruments SN74ALVCHR16601

18-битный универсальный шинный трансивер с выходами с 3 состояниями

Datasheets

SN74ALVCHR16601 datasheet
PDF, 1.0 Мб, Версия: I, Файл опубликован: 10 сен 2004
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Цены

25 предложений от 22 поставщиков
Микросхема Логический контроллер, 18Bit Universal Bus Transceiver With 3-State Outputs 56-SSOP -40℃ to 85℃
ЧипСити
Россия
SN74ALVCHR16601GR
Texas Instruments
108 ₽
Элитан
Россия
SN74ALVCHR16601G
Texas Instruments
152 ₽
Кремний
Россия и страны СНГ
SN74ALVCHR16601GR
Texas Instruments
по запросу
SN74ALVCHR16601DLR
Texas Instruments
по запросу

Статус

SN74ALVCHR16601DLSN74ALVCHR16601GRSN74ALVCHR16601LRSN74ALVCHR16601VR
Статус продуктаВ производствеВ производствеВ производствеВ производстве
Доступность образцов у производителяНетНетНетНет

Корпус / Упаковка / Маркировка

SN74ALVCHR16601DLSN74ALVCHR16601GRSN74ALVCHR16601LRSN74ALVCHR16601VR
N1234
Pin56565656
Package TypeDLDGGDLDGV
Industry STD TermSSOPTSSOPSSOPTVSOP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY20200010002000
CarrierTUBELARGE T&RLARGE T&RLARGE T&R
МаркировкаALVCHR16601ALVCHR16601ALVCHR16601VR601
Width (мм)7.496.17.494.4
Length (мм)18.411418.4111.3
Thickness (мм)2.591.152.591.05
Pitch (мм).635.5.635.4
Max Height (мм)2.791.22.791.2
Mechanical DataСкачатьСкачатьСкачатьСкачать

Параметры

Parameters / ModelsSN74ALVCHR16601DL
SN74ALVCHR16601DL
SN74ALVCHR16601GR
SN74ALVCHR16601GR
SN74ALVCHR16601LR
SN74ALVCHR16601LR
SN74ALVCHR16601VR
SN74ALVCHR16601VR
Bits18181818
F @ Nom Voltage(Max), Mhz150150150150
ICC @ Nom Voltage(Max), мА0.040.040.040.04
Рабочий диапазон температур, Cот -40 до 85от -40 до 85от -40 до 85от -40 до 85
Output Drive (IOL/IOH)(Max), мА-12/12-12/12-12/12-12/12
Package GroupSSOPTSSOPSSOPTVSOP
Package Size: mm2:W x L, PKG56SSOP: 191 mm2: 10.35 x 18.42(SSOP)56TSSOP: 113 mm2: 8.1 x 14(TSSOP)56SSOP: 191 mm2: 10.35 x 18.42(SSOP)56TVSOP: 72 mm2: 6.4 x 11.3(TVSOP)
RatingCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNo
Technology FamilyALVCALVCALVCALVC
VCC(Max), В3.63.63.63.6
VCC(Min), В1.651.651.651.65
Voltage(Nom), В3.33.33.33.3
tpd @ Nom Voltage(Max), нс5.45.45.45.4

Экологический статус

SN74ALVCHR16601DLSN74ALVCHR16601GRSN74ALVCHR16601LRSN74ALVCHR16601VR
RoHSСовместимСовместимСовместимСовместим

Application Notes

  • TI SN74ALVC16835 Component Specification Analysis for PC100
    PDF, 43 Кб, Файл опубликован: 3 авг 1998
    The PC100 standard establishes design parameters for the PC SDRAM DIMM that is designed to operate at 100 MHz. The 168-pin, 8-byte, registered SDRAM DIMM is a JEDEC-defined device (JC-42.5-96-146A). Some of the defined signal paths include data signals, address signals, and control signals. This application report discusses the SN74ALVC16835 18-bit universal bus driver that is available from T
  • Logic Solutions for PC-100 SDRAM Registered DIMMs (Rev. A)
    PDF, 96 Кб, Версия: A, Файл опубликован: 13 май 1998
    Design of high-performance personal computer (PC) systems that are capable of meeting the needs imposed by modern operating systems and software includes the use of large banks of SDRAMs on DIMMs (see Figure 1).To meet the demands of stable functionality over the broad spectrum of operating environments, meet system timing needs, and to support data integrity, the loads presented by the large
  • Bus-Hold Circuit
    PDF, 418 Кб, Файл опубликован: 5 фев 2001
    When designing systems that include CMOS devices, designers must pay special attention to the operating condition in which all of the bus drivers are in an inactive, high-impedance condition (3-state). Unless special measures are taken, this condition can lead to undefined levels and, thus, to a significant increase in the device?s power dissipation. In extreme cases, this leads to oscillation of
  • 16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)
    PDF, 895 Кб, Версия: B, Файл опубликован: 22 май 2002
    TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa
  • Benefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A)
    PDF, 154 Кб, Версия: A, Файл опубликован: 8 сен 1999
    In the last few years the trend toward reducing supply voltage (VCC) has continued as reflected in an additional specification of 2.5-V VCC for the AVC ALVT ALVC LVC LV and the CBTLV families.In this application report the different logic levels at VCC of 5 V 3.3 V 2.5 V and 1.8 V are compared. Within the report the possibilities for migration from 5-V logic and 3.3-V logic families

Модельный ряд

Классификация производителя

  • Semiconductors> Logic> Universal Bus Function> Universal Bus Transceiver (UBT)

На английском языке: Datasheet Texas Instruments SN74ALVCHR16601

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