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Datasheet Texas Instruments SN74GTLPH1645 — Даташит

ПроизводительTexas Instruments
СерияSN74GTLPH1645
Datasheet Texas Instruments SN74GTLPH1645

16-Bit LVTTL-to-GTLP Adjustable-Edge-Rate Bus Transceiver

Datasheets

16-Bit LVTTL-to-GTLP Adjustable-Edge-Rate Bus Transceiver datasheet
PDF, 1.0 Мб, Версия: D, Файл опубликован: 4 сен 2001
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Цены

Выбираем схему BMS для заряда литий-железофосфатных (LiFePO4) аккумуляторов

Статус

74GTLPH1645DGGRG4SN74GTLPH1645DGGRSN74GTLPH1645DGVR
Статус продуктаВ производствеВ производствеВ производстве
Доступность образцов у производителяДаДаДа

Корпус / Упаковка / Маркировка

74GTLPH1645DGGRG4SN74GTLPH1645DGGRSN74GTLPH1645DGVR
N123
Pin565656
Package TypeDGGDGGDGV
Industry STD TermTSSOPTSSOPTVSOP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY200020002000
CarrierLARGE T&RLARGE T&RLARGE T&R
МаркировкаGTLPH1645GTLPH1645GL45
Width (мм)6.16.14.4
Length (мм)141411.3
Thickness (мм)1.151.151.05
Pitch (мм).5.5.4
Max Height (мм)1.21.21.2
Mechanical DataСкачатьСкачатьСкачать

Параметры

Parameters / Models74GTLPH1645DGGRG4
74GTLPH1645DGGRG4
SN74GTLPH1645DGGR
SN74GTLPH1645DGGR
SN74GTLPH1645DGVR
SN74GTLPH1645DGVR
Bits161616
F @ Nom Voltage(Max), Mhz175175175
ICC @ Nom Voltage(Max), мА404040
Рабочий диапазон температур, Cот -40 до 85от -40 до 85от -40 до 85
Output Drive (IOL/IOH)(Max), мА100100100
Package GroupTSSOPTSSOPTVSOP
Package Size: mm2:W x L, PKG56TSSOP: 113 mm2: 8.1 x 14(TSSOP)56TSSOP: 113 mm2: 8.1 x 14(TSSOP)56TVSOP: 72 mm2: 6.4 x 11.3(TVSOP)
RatingCatalogCatalogCatalog
Schmitt TriggerNoNoNo
Technology FamilyGTLPGTLPGTLP
VCC(Max), В3.453.453.45
VCC(Min), В3.153.153.15
Voltage(Nom), В3.33.33.3
tpd @ Nom Voltage(Max), нс9.49.49.4

Экологический статус

74GTLPH1645DGGRG4SN74GTLPH1645DGGRSN74GTLPH1645DGVR
RoHSСовместимСовместимСовместим

Application Notes

  • Texas Instruments GTLP Frequently Asked Questions
    PDF, 496 Кб, Файл опубликован: 1 янв 2001
    Using a question-and-answer format, advantages of TI?s GTLP devices, particularly for backplane applications, are presented, as well as differences between GTLP and GTL/LVDS devices. Applicable topics include data throughput rates, synchronous clocks, price and alternative sources, bus transceivers, live insertion, power consumption, backplane termination, voltage translation, IBIS and HSPICE mode
  • Logic in Live-Insertion Applications With a Focus on GTLP
    PDF, 493 Кб, Файл опубликован: 14 янв 2002
    Live-insertion capability is an essential part of today?s high-speed data systems because those systems are expected to run continuously without being powered down. This application report delves into the cause and prevention of live-insertion and nanosecond-discontinuity effects, using both simulation and actual test measurements from a specially built GTLP EVM. Hypothetical cases for precharge c
  • Achieving Maximum Speed on Parallel Buses With Gunning Transceiver Logic (GTLP)
    PDF, 585 Кб, Файл опубликован: 5 апр 2001
    This application report compares two approaches for synchronous bus-system designs. The focus of the report is the comparison of a system using central-synchronous system clock (CSSC) with a system operated with a source-synchronous system clock (SSSC).The basic characteristics of lines, key factors that influence the bus line delay, and the impedance of bus lines are described.The theoretical
  • Fast GTLP Backplanes With the GTLPH1655 (Rev. A)
    PDF, 1.1 Мб, Версия: A, Файл опубликован: 19 сен 2000
    This revision of the Fast GTL Backplanes With the GTL1655 application report addresses improvements, such as the improved OECE circuitry and implementation of theTexas Instruments TI-OPCE circuitry, that have been incorporated in the GTLPH1655 device. These improvements significantly improve signal integrity in distributed loads.This application report describes the physical principles of fast
  • Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices
    PDF, 209 Кб, Файл опубликован: 10 май 2002
    Many telecom and networking applications require that cards be inserted and extracted from a live backplane without interrupting data or damaging components. To achieve this interface terminals of the card must be electrically isolated from the bus system during insertion or extraction from the backplane. To facilitate this Texas Instruments provides bus-interface and logic devices with features

Модельный ряд

Классификация производителя

  • Semiconductors> Logic> Backplane Logic (GTL/TTL/BTL/ECL Transceiver/Translator)

На английском языке: Datasheet Texas Instruments SN74GTLPH1645

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