Datasheet Texas Instruments 8V182512IDGGREP — Даташит
| Производитель | Texas Instruments |
| Серия | SN74LVTH182512-EP |
| Модель | 8V182512IDGGREP |
Усовершенствованный продукт Устройства для тестирования Abt Scan с напряжением 3,3 В с 18-разрядными приемопередатчиками универсальной шины 64-TSSOP от -40 до 85
Datasheets
SN74LVTH18512-EP, SN74LVTH182512-EP datasheet
PDF, 678 Кб, Файл опубликован: 10 ноя 2003
Выписка из документа
Статус
| Статус продукта | В производстве (Рекомендуется для новых разработок) |
| Доступность образцов у производителя | Нет |
Корпус / Упаковка / Маркировка
| Pin | 64 |
| Package Type | DGG |
| Industry STD Term | TSSOP |
| JEDEC Code | R-PDSO-G |
| Package QTY | 2000 |
| Carrier | LARGE T&R |
| Маркировка | LH182512EP |
| Width (мм) | 6.1 |
| Length (мм) | 17 |
| Thickness (мм) | 1.15 |
| Pitch (мм) | .5 |
| Max Height (мм) | 1.2 |
| Mechanical Data | Скачать |
Параметры
| Bits | 18 |
| ICC @ Nom Voltage(Max) | 24 мА |
| Тип входа | TTL |
| Рабочий диапазон температур | от -40 до 85 C |
| Output Drive (IOL/IOH)(Max) | 64/-32 мА |
| Тип выхода | TTL |
| Package Group | TSSOP |
| Package Size: mm2:W x L | 64TSSOP: 138 mm2: 8.1 x 17(TSSOP) PKG |
| Rating | HiRel Enhanced Product |
| Technology Family | LVT |
| VCC(Max) | 3.6 В |
| VCC(Min) | 2.7 В |
| tpd @ Nom Voltage(Max) | 5.7 нс |
Экологический статус
| RoHS | Совместим |
Application Notes
- LVT Family Characteristics (Rev. A)PDF, 98 Кб, Версия: A, Файл опубликован: 1 мар 1998
To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti - LVT-to-LVTH ConversionPDF, 84 Кб, Файл опубликован: 8 дек 1998
Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed. - 16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)PDF, 895 Кб, Версия: B, Файл опубликован: 22 май 2002
TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa - Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)PDF, 105 Кб, Версия: A, Файл опубликован: 1 авг 1997
The spectrum of bus-interface devices with damping resistors or balanced/light output drive currently offered by various logic vendors is confusing at best. Inconsistencies in naming conventions and methods used for implementation make it difficult to identify the best solution for a given application. This report attempts to clarify the issue by looking at several vendors? approaches and discussi - Understanding Advanced Bus-Interface Products Design GuidePDF, 253 Кб, Файл опубликован: 1 май 1996
- Power-Up 3-State (PU3S) Circuits in TI Standard Logic DevicesPDF, 209 Кб, Файл опубликован: 10 май 2002
Many telecom and networking applications require that cards be inserted and extracted from a live backplane without interrupting data or damaging components. To achieve this interface terminals of the card must be electrically isolated from the bus system during insertion or extraction from the backplane. To facilitate this Texas Instruments provides bus-interface and logic devices with features - Input and Output Characteristics of Digital Integrated CircuitsPDF, 1.7 Мб, Файл опубликован: 1 окт 1996
This report contains a comprehensive collection of the input and output characteristic curves of typical integrated circuits from various logic families. These curves go beyond the information given in data sheets by providing additional details regarding the characteristics of the components. This knowledge is particularly useful when for example a decision must be made as to which circuit shou
Модельный ряд
Серия: SN74LVTH182512-EP (2)
- 8V182512IDGGREP V62/04730-01XE
Классификация производителя
- Semiconductors > Space & High Reliability > Logic Products > Specialty Logic Products > Boundary Scan (JTAG)
