Datasheet Texas Instruments SN74LVTH373IPWREP — Даташит
Производитель | Texas Instruments |
Серия | SN74LVTH373-EP |
Модель | SN74LVTH373IPWREP |

Усовершенствованное изделие, 3,3 В, восьмеричные прозрачные защелки типа D, с выходами с 3 состояниями, 20-TSSOP от -40 до 85
Datasheets
Цены
![]() 16 предложений от 13 поставщиков Микросхема Логический замок, Enhanced Product 3.3V Abt Octal Transparent D-Type Latches With 3-State Outputs 20-TSSOP -40℃ to 85℃ | |||
SN74LVTH373IPWREP Texas Instruments | 115 ₽ | ||
SN74LVTH373IPWREP Texas Instruments | 121 ₽ | ||
SN74LVTH373IPWREP Texas Instruments | 282 ₽ | ||
SN74LVTH373IPWREP Texas Instruments | по запросу |
Статус
Статус продукта | В производстве (Рекомендуется для новых разработок) |
Доступность образцов у производителя | Нет |
Корпус / Упаковка / Маркировка
Pin | 20 |
Package Type | PW |
Industry STD Term | TSSOP |
JEDEC Code | R-PDSO-G |
Package QTY | 2000 |
Carrier | LARGE T&R |
Маркировка | LH373EP |
Width (мм) | 4.4 |
Length (мм) | 6.5 |
Thickness (мм) | 1 |
Pitch (мм) | .65 |
Max Height (мм) | 1.2 |
Mechanical Data | Скачать |
Параметры
3-State Output | Yes |
Bits | 8 |
F @ Nom Voltage(Max) | 160 Mhz |
ICC @ Nom Voltage(Max) | 5 мА |
Тип входа | TTL |
Рабочий диапазон температур | от -40 до 85 C |
Output Drive (IOL/IOH)(Max) | 64/-32 мА |
Тип выхода | TTL |
Package Group | TSSOP |
Package Size: mm2:W x L | 20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP) PKG |
Rating | HiRel Enhanced Product |
Technology Family | LVT |
VCC(Max) | 3.6 В |
VCC(Min) | 2.7 В |
tpd @ Nom Voltage(Max) | 3.9 нс |
Экологический статус
RoHS | Совместим |
Application Notes
- LVT Family Characteristics (Rev. A)PDF, 98 Кб, Версия: A, Файл опубликован: 1 мар 1998
To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti - LVT-to-LVTH ConversionPDF, 84 Кб, Файл опубликован: 8 дек 1998
Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed.
Модельный ряд
Серия: SN74LVTH373-EP (2)
- SN74LVTH373IPWREP V62/04675-01XE
Классификация производителя
- Semiconductors > Space & High Reliability > Logic Products > Flip-Flop/Latch/Registers